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LAN9220-ABZJ View Datasheet(PDF) - SMSC -> Microchip

Part Name
Description
MFG CO.
'LAN9220-ABZJ' PDF : 151 Pages View PDF
16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
BITS
12:11
10
9
8
7
6
5
4
3
2-0
DESCRIPTION
Reserved
TX Data FIFO Overrun Interrupt (TDFO). Generated when the TX data
FIFO is full, and another write is attempted.
TX Data FIFO Available Interrupt (TDFA). Generated when the TX data
FIFO available space is greater than the programmed level.
TX Status FIFO Full Interrupt (TSFF). Generated when the TX Status
FIFO is full.
TX Status FIFO Level Interrupt (TSFL). Generated when the TX Status
FIFO reaches the programmed level.
RX Dropped Frame Interrupt (RXDF_INT). This interrupt is issued
whenever a receive frame is dropped.
Reserved
RX Status FIFO Full Interrupt (RSFF). Generated when the RX Status
FIFO is full.
RX Status FIFO Level Interrupt (RSFL). Generated when the RX Status
FIFO reaches the programmed level.
GPIO [2:0] (GPIOx_INT). Interrupts are generated from the GPIO’s.
These interrupts are configured through the GPIO_CFG register.
TYPE
RO
R/WC
DEFAULT
-
0
R/WC
0
R/WC
0
R/WC
0
R/WC
0
RO
-
R/WC
0
R/WC
0
R/WC
000
SMSC LAN9220
83
DATASHEET
Revision 2.7 (03-15-10)
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