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LAN9220-ABZJ View Datasheet(PDF) - SMSC -> Microchip

Part Name
Description
MFG CO.
'LAN9220-ABZJ' PDF : 151 Pages View PDF
16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
BITS
DESCRIPTION
0 Soft Reset (SRST). Writing 1 generates a software initiated reset. This reset
generates a full reset of the MAC CSR’s. The SCSR’s (system command
and status registers) are reset except for any NASR bits. Soft reset also
clears any TX or RX errors (TXE/RXE). This bit is self-clearing.
Notes:
„ Do not attempt a soft reset unless the PHY is fully awake and operational.
After a PHY reset, or when returning from a reduced power state, the PHY
must given adequate time to return to the operational state before a soft
reset can be issued.
„ The LAN9220 must always be read at least once after power-up, reset, or
upon return from a power-saving state or write operations will not function.
TYPE
SC
DEFAULT
0
SMSC LAN9220
89
DATASHEET
Revision 2.7 (03-15-10)
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