LF3310QC15 View Datasheet(PDF) - LOGIC Devices
Part Name
Description
MFG CO.
'LF3310QC15' PDF : 21 Pages View PDF
DEVICES INCORPORATED
LF3310
Horizontal / Vertical Digital Image Filter
done by setting HLD HIGH on the
clock cycle after the clock cycle which
latches the last data value. It is
important that the LF InterfaceTM
remain disabled when not loading
data into it.
The horizontal coefficient banks may
only be loaded with the Horizontal
LF InterfaceTM and the vertical coeffi-
cient banks may only be loaded with
the Vertical LF InterfaceTM. The
Configuration and Control Registers
may be loaded with either the Hori-
zontal or Vertical LF InterfacesTM.
Since both LF InterfacesTM operate
independently of each other, both
LF InterfacesTM can load data into
their respective coefficient banks at
the same time. Or, one LF InterfaceTM
can load the Configuration/Control
Registers while the other loads it’s
respective coefficient banks. If both
LF InterfacesTM are used to load a
configuration or control register at the
same time, the Vertical LF InterfaceTM
will be given priority over the Hori-
zontal LF InterfaceTM. For example, if
the Horizontal LF InterfaceTM at-
tempts to load data into a Configura-
tion Register at the same time that the
Vertical LF InterfaceTM attempts to
load a horizontal round register, the
Vertical LF InterfaceTM will be allowed
to load the round register while the
Horizontal LF InterfaceTM will not be
allowed to load the Configuration
Register. However, the Horizontal
LF InterfaceTM will continue to func-
tion as if the write occurred.
TABLE 18. SELECT REGISTER LOADING FORMAT
H/VCF11 H/VCF10 H/VCF9 H/VCF8 H/VCF7 H/VCF6 H/VCF5 H/VCF4 H/VCF3 H/VCF2 H/VCF1 H/VCF0
1st Word - Address 0
1
0
0
0
0
0
0
0
0
1
0
2nd Word - Data
0
0
0
0
0
0
0
0
1
1
1
1
TABLE 19. LIMIT REGISTER LOADING FORMAT
H/VCF11 H/VCF10 H/VCF9 H/VCF8 H/VCF7 H/VCF6 H/VCF5 H/VCF4 H/VCF3 H/VCF2 H/VCF1 H/VCF0
1st Word - Address 1
1
1
0
0
0
0
0
0
1
1
1
2nd Word - Data
0*
0
1
1
1
0
0
1
0
0
0
0
3rd Word - Data
0**
1
1
1
0
1
0
0
0
0
1
1
* This bit represents the MSB of the Lower Limit.
** This bit represents the MSB of the Upper Limit.
Video Imaging Products
16
11/08/2001-LDS.3310-H
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