16M (1M × 16, 2M × 8) Flash Memory
LH28F016SA
AC Characteristics for CE » - Controlled Command Write Operations1 (Continued)
TA = 0°C to +70°C
SYMBOL
PARAMETER
VCC = 5.0 V ± 0.25 V
TYP. MIN. MAX.
tAVAV
tPHWL
tVPEH
tWLEL
tAVEH
tDVEH
tELEH
tEHDX
tEHAX
tEHWH
tEHEL
tGHEL
tEHRL
tRHPL
Write Cycle Time
RP » Setup to WE Going Low
VPP Setup to CE » Going High
WE Setup to CE » Going Low
Address Setup to CE» Going High
Data Setup to CE» Going High
CE » Pulse Width
Data Hold from CE» High
Address Hold from CE » High
WE Hold from CE » High
CE » Pulse Width High
Read Recovery before Write
CE » High to RY »/BY » Going Low
RP » Hold from Valid Status Register
(CSR, GSR, BSR) Data and
RY »/BY » High
70
480
100
0
50
50
40
0
10
10
30
0
100
0
tPHEL RP» High Recovery to CE» Going Low
1
tEHGL Write Recovery before Read
60
VPP Hold from Valid Status
tQVVL Register (CSR, GSR, BSR) Data
0
and RY »/BY » High
tEHQV1
Duration of Word/Byte Write
Operation
6
4.5
tEHQV2 Duration of Block Erase Operation
0.3
VCC = 5.0 V ± 0.5 V
TYP. MIN. MAX.
80
480
100
0
50
50
50
0
10
10
50
0
100
0
1
80
0
6
4.5
0.3
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
µs
µs
s
NOTE
3
2, 6
2, 6
2
2
3
4, 5
4
NOTES:
CE » is defined as the latter of CE »0 or CE »1 going Low or the first of CE »0 or CE »1 going High.
1. Read timing during write and erase are the same as for normal read.
2. Refer to command definition tables for valid address and data values.
3. Sampled, but not 100% tested.
4. Write/Erase durations are measured to valid Status Register (CSR) Data.
5. Word/Byte write operations are typically performed with 1 Programming Pulse.
6. Address and Data are latched on the rising edge of CE » for all Command Write Operations.
31