LH28F320S5HB-L12 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LH28F320S5HB-L12' PDF : 61 Pages View PDF
sharp
LHF32K10
34
6.2.2 AC INPUT/OUTPUT TEST CONDITIONS
3.0
INPUT
1.5
TEST POINTS
1.5
OUTPUT
0.0
AC test inputs are driven at 3.0V for a Logic "1" and 0.0V for a Logic "0." Input timing begins, and output timing ends, at 1.5V.
Input rise and fall times (10% to 90%) <10 ns.
Figure 14. Transient Input/Output Reference Waveform for VCC=5V±0.25V
(High Speed Testing Configuration)
2.4
2.0
2.0
INPUT
TEST POINTS
OUTPUT
0.45
0.8
0.8
AC test inputs are driven at VOH (2.4 VTTL) for a Logic "1" and VOL (0.45 VTTL) for a Logic "0." Input timing begins at VIH
(2.0 VTTL) and VIL (0.8 VTTL). Output timing ends at VIH and VIL. Input rise and fall times (10% to 90%) <10 ns.
Figure 15. Transient Input/Output Reference Waveform for VCC=5V±0.5V
(Standard Testing Configuration)
1.3V
1N914
DEVICE
UNDER
TEST
CL Includes Jig
Capacitance
RL=3.3kΩ
OUT
CL
Test Configuration Capacitance Loading Value
Test Configuration
VCC=5V±0.25V
VCC=5V±0.5V
CL(pF)
30
100
Figure 16. Transient Equivalent Testing
Load Circuit
Rev. 1.6
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