LH28F320S5HB-L12 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LH28F320S5HB-L12' PDF : 61 Pages View PDF
sharp
LHF32K10
44
6.2.7 RESET OPERATIONS
High Z
STS(R)
VOL
VIH
RP#(P)
VIL
High Z
STS(R)
VOL
VIH
RP#(P)
VIL
tPLPH
(A)Reset During Read Array Mode
tPLRH
tPLPH
(B)Reset During Block Erase, Full Chip Erase, (Multi) Word/Byte Write
or Block Lock-Bit Configuretion
5V
VCC
VIL
VIH
RP#(P)
VIL
t5VPH
(C)VCC Power Up Timing
Figure 21. AC Waveform for Reset Operation
Reset AC Specifications(1)
Symbol
Parameter
Notes
VCC=5V
Min.
Max.
Unit
tPLPH
RP# Pulse Low Time
(If RP# is tied to VCC, this specification is not applicable)
100
tPLRH RP# Low to Reset during Block Erase, Full Chip Erase,
(Multi) Word/Byte Write or Block Lock-Bit Configuration
2,3
ns
13.1
µs
t5VPH VCC at 4.5V to RP# High
NOTES:
4
100
ns
1. These specifications are valid for all product versions (packages and speeds).
2. If RP# is asserted while a block erase, full chip erase, (multi) word/byte write or block lock-bit configuration
operation is not executing, the reset will complete within 100ns.
3. A reset time, tPHQV, is required from the latter of STS going High Z or RP# going high until outputs are valid.
4. When the device power-up, holding RP# low minimum 100ns is required after VCC has been in predefined range
and also has been in stable there.
Rev. 1.55
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