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LH28F400SUT-NC80 View Datasheet(PDF) - Sharp Electronics

Part Name
Description
MFG CO.
LH28F400SUT-NC80
Sharp
Sharp Electronics Sharp
'LH28F400SUT-NC80' PDF : 35 Pages View PDF
LH28F400SU-NC
4M (512K × 8, 256K × 16) Flash Memory
Timing Nomenclature
For 5.0 V systems use the standard JEDEC cross point definitions.
Each timing parameter consists of 5 characters. Some common examples are defined below:
tCE tELQV time (t) from CE » (E) going low (L) to the outputs (Q) becoming valid (V)
tOE tGLQV time (t) from OE » (G) going low (L) to the outputs (Q) becoming valid (V)
tACC tAVQV time (t) from address (A) valid (V) to the outputs (Q) becoming valid (V)
tAS tAVWH time (t) from address (A) valid (V) to WE » (W) going high (H)
tDH tWHDX time (t) from WE » (W) going high (H) to when the data (D) can become undefined (X)
PIN CHARACTERS
A Address Inputs
D Data Inputs
Q Data Outputs
E CE » (Chip Enable)
G OE» (Output Enable)
W WE (Write Enable)
P RP » (Deep Power-Down Pin)
R RY »/BY » (Ready/Busy)
V Any Voltage Level
5 V VCC at 4.5 V Min.
PIN STATES
H High
L Low
V Valid
X Driven, but not necessarily valid
Z High Impedance
2.4
2.0
INPUT
TEST POINTS
0.45
0.8
2.0
OUTPUT
0.8
NOTE:
AC test inputs are driven at VOH (2.4 VTTL) for a Logic '1' and VOL
(0.45 VTTL) for a Logic '0'. Input timing begins at VIH (2.0 VTTL)
and VIL (0.8 VTTL). Output timing ends at VIH and VIL. Input rise
and fall times (10% to 90%) < 10 ns.
28F400SUT-NC60-13
Figure 15. Transient Input/Output
Reference Waveform (VCC = 5.0 V ±0.5 V)
2.5 ns OF 25 Ω TRANSMISSION LINE
FROM OUTPUT
UNDER TEST
TEST
POINT
TOTAL CAPACITANCE = 100 pF
28F400SUT-NC60-15
Figure 17. Transient Equivalent Testing
Load Circuit (VCC = 5.0 V ±0.5 V)
3.0
INPUT 1.5
0.0
TEST POINTS
1.5 OUTPUT
NOTE:
AC test inputs are driven at 3.0 V for a Logic '1'
and 0.0 V for a Logic '0'. Input timing begins,
and output timing ends at 1.5 V. Input rise
and fall times (10% to 90%) < 10 ns.
28F400SUT-NC60-14
Figure 16. Transient Input/Output
Reference Waveform (VCC = 5.0 V ±.25 V)
20
2.5 ns OF 83 Ω TRANSMISSION LINE
FROM OUTPUT
UNDER TEST
TEST
POINT
TOTAL CAPACITANCE = 30 pF
28F400SUT-NC60-16
Figure 18. Transient Equivalent Testing
Load Circuit (VCC = 5.0 V ±.25 V)
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