LH543621 View Datasheet(PDF) - Sharp Electronics

Part Name

Description

MFG CO.

LH543621

512 × 36 × 2 / 1024 × 36 × 2 Synchronous Bidirectional FIFO

Sharp Electronics 

Prev 31 32 33 34 35 36 37 38 39 40 Next

LH543611/21

TIMING DIAGRAMS (cont’d)

512 x 36 x 2/1024 x 36 x 2 BiFIFOs

CKA (CKB)

tRWS tRWH

R/WA (R/WB)

ENA (ENB)

t ES

t EH

tRQS

tRQH

REQA (REQB)

t AF

t AF

AF1 (AF2)

CKB (CKA)

tRWS tRWH

R/WB (R/WA )

ENB (ENA)

t ES

t EH

tRQS

tRQH

REQB (REQA)

NOTES:

1. A2A, A1A, and A0A all are held HIGH for FIFO access at Port A.

A0B is held HIGH for FIFO access at Port B.

2. Parameters without parentheses apply to FIFO #1 operation.

Parameters with parentheses apply to FIFO #2 operation.

3. Assertion of the Almost-Full Flags is controlled by rising clock

edges; whereas, deassertion of the Almost-Full Flags is controlled

by falling clock edges.

Figure 24. Almost-Full Flag Timing, When Asynchronous

543611-29

36

Share Link: