Architectural Overview
– Clock gating to individual peripherals for power savings
– IEEE 1149.1-1990 compliant Test Access Port (TAP) controller
– Debug access via JTAG and Serial Wire interfaces
– Full JTAG boundary scan
Industrial-range 48-pin RoHS-compliant LQFP package
1.2 Target Applications
Factory automation and control
Industrial control power devices
Building and home automation
Brushless DC motors
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April 27, 2007
Preliminary