LPC1776 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
LPC1776
NXP Semiconductors.
'LPC1776' PDF : 117 Pages View PDF
NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
Table 5. Pin allocation table TFBGA180
Not all functions are available on all parts. See Table 2 and Table 7 (EMC pins).
Ball Symbol
Ball Symbol
Ball Symbol
Row J
1
RESET
2 RTCX1
3 RTCX2
5
P0[13]
6-
7-
9
-
10 P0[19]
11 P4[8]
13 P0[18]
14 VDD(3V3)
-
Row K
1
VBAT
2 P1[31]
3 P1[30]
5
P0[29]
6 P1[20]
7 P3[26]
9
P4[3]
10 P4[6]
11 P0[21]
13 P4[26]
14 P0[20]
-
Row L
1
P2[29]
2 XTAL1
3 P0[27]
5
P1[18]
6 P4[0]
7 P1[25]
9
VSS
13 VSS
Row M
10 P0[10]
14 P0[22]
11 VDD(3V3)
-
1
P0[28]
2 P2[28]
3 P3[25]
5
P0[14]
6 P1[22]
7 P4[1]
9
P1[27]
10 P0[0]
11 P2[13]
13 P2[10]
14 P4[19]
-
Row N
1
P0[31]
2 USB_D-2
3 P3[24]
5
P2[19]
6 P1[21]
7 P1[23]
9
VDD(REG)(3V3)
13 P4[17]
10 P1[29]
14 P2[12]
11 P0[1]
-
Row P
1
P2[24]
2 P2[25]
3 P2[18]
5
P1[19]
6 P2[20]
7 P1[24]
9
P2[16]
10 P1[28]
11 P2[17]
13 P4[4]
14 P4[18]
-
7. Functional description
Ball Symbol
4 P0[12]
8-
12 P0[17]
-
4 XTAL2
8
VDD(3V3)
12 P4[7]
-
4
VDD(3V3)
8
VSSREG
12 P5[2]
-
4 P3[23]
8 P4[2]
12 P2[11]
-
4 P0[30]
8 P2[21]
12 P4[16]
-
4
VSS
8 P1[26]
12 P0[11]
-
7.1 Architectural overview
The ARM Cortex-M3 includes three AHB-Lite buses: the system bus, the I-code bus, and
the D-code bus. The I-code and D-code core buses are faster than the system bus and
are used similarly to Tightly Coupled Memory (TCM) interfaces: one bus dedicated for
instruction fetch (I-code) and one bus for data access (D-code). The use of two core
buses allows for simultaneous operations if concurrent operations target different devices.
LPC178X_7X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5.5 — 26 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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