LPC1777 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
LPC1777
NXP Semiconductors.
'LPC1777' PDF : 120 Pages View PDF
NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
7.14 Ethernet
Remark: The Ethernet block is available on parts LPC1788/86 and LPC1778/76.
The Ethernet block contains a full featured 10 Mbit/s or 100 Mbit/s Ethernet MAC
designed to provide optimized performance through the use of DMA hardware
acceleration. Features include a generous suite of control registers, half or full duplex
operation, flow control, control frames, hardware acceleration for transmit retry, receive
packet filtering and wake-up on LAN activity. Automatic frame transmission and reception
with scatter-gather DMA off-loads many operations from the CPU.
The Ethernet block and the CPU share the ARM Cortex-M3 D-code and system bus
through the AHB-multilayer matrix to access the various on-chip SRAM blocks for
Ethernet data, control, and status information.
The Ethernet block interfaces between an off-chip Ethernet PHY using the Media
Independent Interface (MII) or Reduced MII (RMII) protocol and the on-chip Media
Independent Interface Management (MIIM) serial bus.
7.14.1 Features
• Ethernet standards support:
– Supports 10 Mbit/s or 100 Mbit/s PHY devices including 10 Base-T, 100 Base-TX,
100 Base-FX, and 100 Base-T4.
– Fully compliant with IEEE standard 802.3.
– Fully compliant with 802.3x Full Duplex Flow Control and Half Duplex back
pressure.
– Flexible transmit and receive frame options.
– Virtual Local Area Network (VLAN) frame support
–.
• Memory management:
– Independent transmit and receive buffers memory mapped to shared SRAM.
– DMA managers with scatter/gather DMA and arrays of frame descriptors.
– Memory traffic optimized by buffering and pre-fetching.
• Enhanced Ethernet features:
– Receive filtering.
– Multicast and broadcast frame support for both transmit and receive.
– Optional automatic Frame Check Sequence (FCS) insertion with Circular
Redundancy Check (CRC) for transmit.
– Selectable automatic transmit frame padding.
– Over-length frame support for both transmit and receive allows any length frames.
– Promiscuous receive mode.
– Automatic collision back-off and frame retransmission.
– Includes power management by clock switching.
– Wake-on-LAN power management support allows system wake-up: using the
receive filters or a magic frame detection filter.
LPC178X_7X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5.5 — 26 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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