LPC1777 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
LPC1777
NXP Semiconductors.
'LPC1777' PDF : 120 Pages View PDF
NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
Table 13. Static characteristics …continued
Tamb = 40 C to +85 C, unless otherwise specified.
Symbol
Parameter
Conditions
VDI
differential input
(D+) (D)
sensitivity voltage
VCM
differential common
includes VDI range
mode voltage range
Vth(rs)se
single-ended receiver
switching threshold
voltage
VOL
LOW-level output
RL of 1.5 k to 3.6 V
voltage for
low-/full-speed
VOH
HIGH-level output
RL of 15 k to GND
voltage (driven) for
low-/full-speed
Ctrans
transceiver capacitance pin to GND
Oscillator pins (see Section 14.2)
Vi(XTAL1)
input voltage on pin
XTAL1
Vo(XTAL2)
output voltage on pin
XTAL2
Vi(RTCX1)
input voltage on pin
RTCX1
Vo(RTCX2)
output voltage on pin
RTCX2
Min
[20] 0.2
[20] 0.8
[20] 0.8
[20] -
[20] 2.8
[20] -
0.5
0.5
0.5
0.5
Typ[1]
-
-
-
Max
-
2.5
2.0
-
0.18
-
3.5
-
20
1.8
1.95
1.8
1.95
-
3.6
-
3.6
[1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.
[2] For USB operation 3.0 V VDD(3V3) 3.6 V. Guaranteed by design.
[3] VDDA and VREFP should be tied to VDD(3V3) if the ADC and DAC are not used.
[4] The RTC typically fails when Vi(VBAT) drops below 1.6 V.
[5] VDD(REG)(3V3) = 3.3 V; Tamb = 25 C for all power consumption measurements.
[6] Boost control bits in the PBOOST register set to 0x0 (see LPC178x/7x User manual UM10470).
[7] Boost control bits in the PBOOST register set to 0x3 (see LPC178x/7x User manual UM10470).
[8] IRC running at 12 MHz; main oscillator and PLL disabled; PCLK = CCLK/4.
[9] BOD disabled.
[10] On pin VBAT; VDD(REG)(3V3) = VDD(3V3) = VDDA = 0; Tamb = 25 C.
[11] On pin VBAT; VDD(REG)(3V3) = VDD(3V3) = VDDA = 3.3 V; Tamb = 25 C.
[12] All internal pull-ups disabled. All pins configured as output and driven LOW. VDD(3V3) = 3.3 V; Tamb = 25 C.
[13] VDDA = 3.3 V; Tamb = 25 C.
[14] Vi(VREFP) = 3.3 V; Tamb = 25 C.
[15] Including voltage on outputs in 3-state mode.
[16] VDD(3V3) supply voltages must be present.
[17] 3-state outputs go into 3-state mode in Deep power-down mode.
[18] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[19] To VSS.
[20] 3.0 V VDD(3V3) 3.6 V.
Unit
V
V
V
V
V
pF
V
V
V
V
LPC178X_7X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5.5 — 26 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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