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LPC1777 View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
MFG CO.
'LPC1777' PDF : 120 Pages View PDF
NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
11.2 External memory interface
Table 17. Dynamic characteristics: Static external memory interface
CL = 30 pF, Tamb = 40 C to 85 C, VDD(3V3) = 3.0 V to 3.6 V. Values guaranteed by design.
Symbol Parameter[1]
Conditions[1]
Min
Typ
Read cycle parameters[2]
tCSLAV CS LOW to address RD1
2.7
3.5
valid time
tCSLOEL CS LOW to OE LOW RD2
time
[3] 2.7 + Tcy(clk)
WAITOEN
3.4 + Tcy(clk)
WAITOEN
tCSLBLSL CS LOW to BLS LOW RD3; PB = 1
[3] 2.8
3.8
time
tOELOEH OE LOW to OE HIGH RD4
time
tam
memory access time RD5
th(D)
tCSHBLSH
data input hold time
CS HIGH to BLS HIGH
time
RD6
PB = 1
[3] (WAITRD
WAITOEN + 1)
Tcy(clk) 2.26
[3][4] (WAITRD
WAITOEN + 1)
Tcy(clk) 8.6
[3][5] 4.1
2.8
(WAITRD
WAITOEN + 1)
Tcy(clk) 2.83
(WAITRD
WAITOEN + 1)
Tcy(clk) 11.9
5.8
3.7
tCSHOEH CS HIGH to OE HIGH
time
[3] 2.7
3.5
tOEHANV OE HIGH to address
invalid time
[3] 0.1
0.1
tdeact
deactivation time
RD7
[3] -
Write cycle parameters[2]
3.4
tCSLAV CS LOW to address WR1
2.7
3.5
valid time
tCSLDV CS LOW to data valid WR2
2.8
3.9
time
tCSLWEL CS LOW to WE LOW WR3; PB =1
time
[3] 2.7 + Tcy(clk)
(1 + WAITWEN)
3.5 + Tcy(clk)
(1 + WAITWEN)
tCSLBLSL CS LOW to BLS LOW WR4; PB = 1
[3] 2.8
3.9
time
tWELWEH WE LOW to WE HIGH WR5; PB =1
time
tBLSLBLSH BLS LOW to BLS HIGH PB = 1
time
tWEHDNV WE HIGH to data
invalid time
WR6; PB =1
[3] (WAITWR
WAITWEN + 1)
Tcy(clk) 2.3
[3] (WAITWR
WAITWEN + 3)
Tcy(clk) 2.6
[3] 2.5 + Tcy(clk)
(WAITWR
WAITWEN + 1)
Tcy(clk) 2.8
(WAITWR
WAITWEN + 3)
Tcy(clk) 3.4
3.3 + Tcy(clk)
tWEHEOW WE HIGH to end of
write time
WR7; PB = 1 [3][6] Tcy(clk) 2.7
Tcy(clk) 3.4
tBLSHDNV BLS HIGH to data
PB = 1
2.7
3.6
invalid time
tWEHANV WE HIGH to address PB = 1
invalid time
[3] 2.4 + Tcy(clk)
3.0 + Tcy(clk)
Max
4.7
4.6 + Tcy(clk)
WAITOEN
5.1
(WAITRD
WAITOEN + 1)
Tcy(clk) 3.7
(WAITRD
WAITOEN + 1)
Tcy(clk) 18.0
-
5.1
4.6
0.16
4.7
4.7
5.1
4.6 + Tcy(clk)
(1 + WAITWEN)
5.1
(WAITWR
WAITWEN + 1)
Tcy(clk) 3.8
(WAITWR
WAITWEN + 3)
Tcy(clk) 4.9
4.3 + Tcy(clk)
Tcy(clk) 4.6
4.8
3.9 + Tcy(clk)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
LPC178X_7X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5.5 — 26 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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