LPC1777 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
LPC1777
NXP Semiconductors.
'LPC1777' PDF : 120 Pages View PDF
NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
Table 17. Dynamic characteristics: Static external memory interface …continued
CL = 30 pF, Tamb = 40 C to 85 C, VDD(3V3) = 3.0 V to 3.6 V. Values guaranteed by design.
Symbol Parameter[1]
Conditions[1]
Min
Typ
tdeact
deactivation time
WR8; PB = 0;
PB = 1
[3] 2.7
3.4
tCSLBLSL CS LOW to BLS LOW WR9; PB = 0
[3] 2.8 + Tcy(clk)
(1 + WAITWEN)
3.7 + Tcy(clk)
(1 + WAITWEN)
tBLSLBLSH BLS LOW to BLS HIGH WR10; PB = 0
time
tBLSHEOW BLS HIGH to end of
write time
WR11; PB = 0
[3] (WAITWR
WAITWEN + 3)
Tcy(clk) 2.6
[3][6] 2.6 + Tcy(clk)
(WAITWR
WAITWEN + 3)
Tcy(clk) 3.4
3.3 + Tcy(clk)
tBLSHDNV BLS HIGH to data
invalid time
WR12;
PB = 0
[3] 2.7 + Tcy(clk)
3.6 + Tcy(clk)
Max
4.7
5.1 + Tcy(clk)
(1 + WAITWEN)
(WAITWR
WAITWEN + 3)
Tcy(clk) 4.9
4.4 + Tcy(clk)
4.8 + Tcy(clk)
Unit
ns
ns
ns
ns
ns
[1] Parameters are shown as RDn or WDn in Figure 16 as indicated in the Conditions column.
[2] Parameters specified for 40 % of VDD(3V3) for rising edges and 60 % of VDD(3V3) for falling edges.
[3] Tcy(clk) = 1/EMC_CLK (see LPC178x/7x User manual UM10470).
[4] Latest of address valid, EMC_CSx LOW, EMC_OE LOW, EMC_BLSx LOW (PB = 1).
[5] After End Of Read (EOR): Earliest of EMC_CSx HIGH, EMC_OE HIGH, EMC_BLSx HIGH (PB = 1), address invalid.
[6] End Of Write (EOW): Earliest of address invalid, EMC_CSx HIGH, EMC_BLSx HIGH (PB = 1).
EMC_Ax
EMC_CSx
EMC_OE
EMC_BLSx
EMC_WE
EMC_Dx
RD1
RD2
RD4
RD7
RD5
RD5
RD5
RD6
EOR
Fig 16. External static memory read/write access (PB = 0)
WR1
WR9 WR10
WR11
WR2
WR12
WR8
EOW
002aag214
LPC178X_7X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5.5 — 26 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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