LPC47B37X View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

MFG CO.

LPC47B37X

100 Pin Enhanced Super I/O for LPC Bus with SMBus Controller for Commercial Applications

SMSC -> Microchip 

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FIFO

MODE

ONLY

BIT 3

0

INTERRUPT

IDENTIFICATION

REGISTER

BIT 2 BIT 1 BIT 0

0

0

0

INTERRUPT SET AND RESET FUNCTIONS

PRIORITY INTERRUPT

INTERRUPT

INTERRUPT

LEVEL

TYPE

SOURCE

RESET CONTROL

Fourth

MODEM

Clear to Send or Reading the

Status

Data Set Ready or MODEM Status

Ring Indicator or Register

Data Carrier

Detect

Line Control Register (LCR)

Address Offset = 3H, DLAB = 0, READ/WRITE

Start

LSB Data 5-8 bits MSB

Parity

Stop

FIGURE 1 - SERIAL DATA

This register contains the format information of the serial line. The bit definitions are:

Bits 0 and 1

These two bits specify the number of bits in each transmitted or received serial character. The encoding of

bits 0 and 1 is as follows:

The Start, Stop and Parity bits are not included in the word length.

BIT 1

0

0

1

1

BIT 0

0

1

0

1

WORD LENGTH

5 Bits

6 Bits

7 Bits

8 Bits

75

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