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LRS1302 View Datasheet(PDF) - Sharp Electronics

Part Name
Description
MFG CO.
LRS1302
Sharp
Sharp Electronics Sharp
'LRS1302' PDF : 61 Pages View PDF
LRS13023
29
5.4 V,,, V,,, i?is Transitions
3lock erase, byte write and lock-bit configuration are
lot guaranteed if Vpp fails outside of a valid VP=
ange, V, falls outside of a valid Vccl range, or RP
N,, or V,,. If V,, error is detected, status register
)it SR3 is set to “1” along with SR4 or SR5, depending
m the attempted operation. If Rp transitions to V,
luring block erase, byte write, or lock-bit
:onfiguration, the operation will abort and the device
ti enter deep power-down. The aborted operation
nay leave data partially altered. Therefore, the
:ommand sequence must be repeated after normal
operation is restored. Device power-off or D
ransitions to V,, clear the status register.
The GUI latches commands issued by system software
md is not altered by V, or a transitions or WSM
~tions. Its state is read array mode upon power-up,
ifter exit from deep power-down or after Vcc
ransitions below Vu0
After block erase, byte write, or lock-bit configuration,
?ven after V,, transitions down to V,,,, the GUI
nust be placed in read array mode via the Read Array
:ommand if subsequent access to the memory array is
iesired.
5.5 Power-Up/Down Protection
The device is designed to offer protection against
t&dental block erasure, byte writing, or lock-bit
:onfiguration during power transitions. Upon
>ower-up, the device is indifferent as to which power
upply (V,, or V,,) powers-up first. Internal circuitry
‘esets the GUI to read array mode at power-up.
A system designer must guard against spurious writes
for V,eoltages above Vu0 when V,, is activ;.:;
both WE and m must be low for a comman
*,
driving either to VIH will inhibit writes. The GUI’s
two-step command sequence architecture provides
added level of protection against data alteration.
In-system block lock and unlock capability prevents
inadvertent data alteration. The device is disabled
while m=V,, regardless of its contro1 inputs state.
5.6 Power Dissipation
When designing portable systems, designers must
consider battery power consumption not only during
device operation, but also for data retention during
system idle time. Flash memory’s nonvolatility
increases usable battery life because data is retained
when system power is removed.
In addition, deep powerdown mode ensures
extremely low power consumption even when system
power is applied.. For example, portable computing
products and other power sensitive applications that
use an array of devices for solid-state storage can
consume negligible power by. lowering i?p to :VK
standby or sleep,modes. If access is again needed, the
devices can be read following the tpHQv and tpHwL
wake-up cycles required after Rp isfirst raised to V,,.
See AC Characteristics- Read Only and Write
Operations and Figures 12,13 .and 14 for more
information.
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