LT1158CS View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LT1158CS' PDF : 20 Pages View PDF
LT1158
U
OPERATIO (Refer to Functional Diagram)
13 goes low in PWM operation, and is maintained by the
charge pump when the top MOSFET is on DC. A regulated
boost driver at pin 1 employs a source-referenced 15V
clamp that prevents the bootstrap capacitor from over-
charging regardless of V+ or output transients.
The LT1158 provides a current-sense comparator and
fault output circuit for protection of the top power MOSFET.
The comparator input pins 11 and 12 are normally con-
nected across a shunt in the source of the top power
MOSFET (or to a current-sensing MOSFET). When pin 11
is more than 1.2V below V+ and V12 – V11 exceeds the
110mV offset, fault pin 5 begins to sink current. During a
short circuit, the feedback loop regulates V12 – V11 to
150mV, thereby limiting the top MOSFET current.
APPLICATIONS INFORMATION
Power MOSFET Selection
Since the LT1158 inherently protects the top and bottom
MOSFETs from simultaneous conduction, there are no
size or matching constraints. Therefore selection can be
made based on the operating voltage and RDS(ON)
requirements. The MOSFET BVDSS should be at least
2 × VSUPPLY, and should be increased to 3 × VSUPPLY in
harsh environments with frequent fault conditions. For the
LT1158 maximum operating supply of 30V, the MOSFET
BVDSS should be from 60V to 100V.
The MOSFET RDS(ON) is specified at TJ = 25°C and is
generally chosen based on the operating efficiency re-
quired as long as the maximum MOSFET junction tem-
perature is not exceeded. The dissipation in each MOSFET
is given by:
( ) ( ) 2
( ) P = D IDS 1+ ∂ RDS ON
where D is the duty cycle and ∂ is the increase in RDS(ON)
at the anticipated MOSFET junction temperature. From
this equation the required RDS(ON) can be derived:
( ) ( ) RDS(ON) =
P
2
D IDS 1+ ∂
For example, if the MOSFET loss is to be limited to 2W
when operating at 5A and a 90% duty cycle, the required
RDS(ON) would be 0.089Ω/(1 + ∂). (1 + ∂) is given for each
MOSFET in the form of a normalized RDS(ON) vs. tempera-
ture curve, but ∂ = 0.007/°C can be used as an approxima-
tion for low voltage MOSFETs. Thus if TA = 85°C and the
available heat sinking has a thermal resistance of 20°C/W,
the MOSFET junction temperature will be 125°C, and
∂ = 0.007(125 – 25) = 0.7. This means that the required
RDS(ON) of the MOSFET will be 0.089Ω/1.7 = 0.0523Ω,
which can be satisfied by an IRFZ34.
Note that these calculations are for the continuous oper-
ating condition; power MOSFETs can sustain far higher
dissipations during transients. Additional RDS(ON) con-
straints are discussed under Starting High In-Rush Cur-
rent Loads.
Paralleling MOSFETs
GATE DR
LT1158
RG
RG
GATE FB
RG: OPTIONAL 10Ω
1158 F01
Figure 1. Paralleling MOSFETs
When the above calculations result in a lower RDS(ON) than
is economically feasible with a single MOSFET, two or
more MOSFETs can be paralleled. The MOSFETs will
inherently share the currents according to their RDS(ON)
ratio. The LT1158 top and bottom drivers can each drive
four power MOSFETs in parallel with only a small loss in
switching speeds (see Typical Performance Characteris-
tics). Individual gate resistors may be required to
“decouple” each MOSFET from its neighbors to prevent
8
Share Link: 
