LT1468-2 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LT1468-2' PDF : 14 Pages View PDF
LT1468-2
APPLICATIONS INFORMATION
Input Considerations
Each input of the LT1468-2 is protected with a 100Ī©
series resistor and back-to-back diodes across the bases
of the input devices. If the inputs can be pulled apart, the
input current should be limited to less than 10mA with
an external series resistor. Each input also has two ESD
clamp diodesāone to each supply. If an input is driven
above the supply, limit the current with an external resistor
to less than 10mA.
The LT1468-2 employs bias current cancellation at the in-
puts. The inverting input current is trimmed at zero common
mode voltage to minimize errors in inverting applications
such as I-to-V converters. The noninverting input current
is not trimmed and has a wider variation and therefore a
larger maximum value. As the input offset current can be
greater than either input current, the use of balanced source
resistance is NOT recommended as it actually degrades
DC accuracy and also increases noise.
The input bias currents vary with common mode voltage
as shown in the Typical Performance Characteristics.
The cancellation circuitry was not designed to track this
common mode voltage because the settling time would
have been adversely affected.
The LT1468 inputs can be driven to the negative supply
and to within 0.5V of the positive supply without phase
reversal. As the input moves closer than 0.5V to the posi-
tive supply, the output reverses phase.
Total Input Noise
The curve of Total Noise vs Unmatched Source Resistance
in the Typical Performance Characteristics shows that
with source resistance below 1k, the voltage noise of the
ampliļ¬er dominates. In the 1k to 20k region the increase
in noise is due to the source resistance. Above 20k the
input current noise component is larger than the resistor
noise.
Input Stage Protection
R1
100Ī© Q1
+IN
R2
Q2 100Ī©
āIN
14682 AI03
14682f
9
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