LT3971 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LT3971' PDF : 24 Pages View PDF
LT3971/LT3971-3.3/LT3971-5
APPLICATIONS INFORMATION
loss. The die temperature is calculated by multiplying the
LT3971 power dissipation by the thermal resistance from
junction to ambient.
Also keep in mind that the leakage current of the power
Schottky diode goes up exponentially with junction tem-
perature. When the power switch is closed, the power
Schottky diode is in parallel with the power converter’s
output filter stage. As a result, an increase in a diode’s
leakage current results in an effective increase in the load,
and a corresponding increase in input power. Therefore,
the catch Schottky diode must be selected with care to
avoid excessive increase in light load supply current at
high temperatures.
Fault Tolerance of MS16E Package
The MS16E package is designed to tolerate single fault
conditions. Shorting two adjacent pins together or leaving
one single pin floating does not raise the output voltage
or cause damage to the LT3971 regulator. However, the
application circuit must meet a few requirements discussed
in this section in order to achieve fault tolerance.
Tables 5 and 6 show the effects that result from shorting
adjacent pins or from a floating pin, respectively.
There are four items which require consideration in terms
of the application circuit to achieve fault tolerance: VIN-EN
pin short, SYNC-GND pin short, SYNC-PG pin short, and
PG-RT pin short. If the EN pin is driven with a logic input,
then a series resistor is needed to protect the circuit gen-
erating the logic input in the event of an EN-VIN pin short.
If the SYNC pin is driven with a clock, a series resistor is
needed so that the clock source, which may be going to
other devices, is not pulled down in the event of a SYNC-
GND pin short. If the PG pull-up resistor is connected to a
voltage source higher than 6V, then the PG resistor needs
to be large enough such that the resistor divider formed
by a PG-RT pin short does not violate the RT pin absolute
maximum. Likewise, a SYNC resistor to GND is needed so
that the resistor divider formed by a PG-SYNC pin short
does not violate the SYNC pin absolute maximum. This
means that typical applications where EN is tied to VIN,
SYNC is grounded, and PG is floating or connected to a
pull-up resistor to an output less than 6V are already set
up for fault tolerance. Figure 10, shows how fault toler-
ance can be achieved when PG, EN, and SYNC features
are used in a high output voltage application.
VIN
15V TO 38V
100k
OFF ON
EN
VIN
BOOST
SW
10µF
LT3971
SS
PG
RT
BD
0.47µF 10µH
150k
PGOOD
1nF 49.9k
SYNC GND FB
CLOCK IN
49.9k
fSW = 800kHz
1M
110k 10pF 10µF
VOUT
12V
1.2A
3971 F10
Figure 10. Fault Tolerant Application with EN, SYNC and PG Functions in Use when Using the MS16E Package
3971fd
20
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