LTC1283CN View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1283CN' PDF : 24 Pages View PDF
LTC1283
APPLICATI S I FOR ATIO
83CL410 Code
MNEMONIC
MOV P1, #02H
CLR P1.3
SETB P1.4
CONTINUE: MOV A, #0DH
LOOP:
CLR P1.4
MOV R4, #08
NOP
MOV C, P1.1
RLC A
MOV P1.2, C
SETB P1.3
CLR P1.3
DJNZ R4, LOOP
MOV R2, A
DESCRIPTION
INITIALIZE PORT 1 (BIT 1 IS MADE AN
INPUT)
SCLK GOES LOW
CS GOES LOW
DIN WORD FOR THE LTC1283 IS PLACED
IN ACC
CS GOES LOW
LOAD COUNTER
DELAY FOR DEGLITCHER
READ DATA BIT INTO CARRY
ROTATE DATA BIT INTO ACC
OUTPUT DIN BIT TO LTC1283
SCLK GOES HIGH
SCLK GOES LOW
NEXT BIT
STORE MSBs IN R2
MNEMONIC
DESCRIPTION
DELAY:
MOV C, P1.1
CLR A
RLC A
SETB P1.3
CLR P1.3
MOV C, P1.1
RRC A
RRC A
MOV R3, A
SETB P1.3
CLR P1.3
SETB P1.4
MOV R5, #07H
DJNZ R5, DELAY
AJMP CONTINUE
READ DATA BIT INTO CARRY
CLEAR ACC
ROTATE DATA BIT INTO ACC
SCLK GOES HIGH
SCLK GOES LOW
READ DATA BIT IN CARRY
ROTATE RIGHT INTO ACC
ROTATE RIGHT INTO ACC
STORE LSBs IN R3
SCLK GOES HIGH
SCLK GOES LOW
CS GOES HIGH
LOAD COUNTER
DELAY FOR LTC1283 TO PERFORM
CONVERSION
REPEAT PROGRAM
6. Sharing the Serial Interface
The LTC1283 can share the same 3-wire serial interface
with other peripheral components or other LTC1283s (see
Figure 5). In this case, the CS signals decide which
LTC1283 is being addressed by the MPU.
ANALOG CONSIDERATIONS
1. Grounding
The LTC1283 should be used with an analog ground plane
and single point grounding techniques.
Pin 11 (AGND) should be tied directly to this ground plane.
Pin 10 (DGND) can also be tied directly to this ground
plane because minimal digital noise is generated within
the chip itself.
Pin 20 (VCC) should be bypassed to the ground plane with
a 4.7µF tantalum with leads as short as possible. Pin 12
(V –) should be bypassed with a 0.1µF ceramic disk. For
single supply applications, V – can be tied to the ground
plane.
It is also recommended that pin 13 (REF –) and pin 9 (COM)
be tied directly to the ground plane. All analog inputs
should be referenced directly to the single point ground.
Digital inputs and outputs should be shielded from and/or
routed away from the reference and analog circuitry.
Figure 6 shows an example of an ideal ground plane design
for a two-sided board. Of course this much ground plane
will not always be possible, but users should strive to get
as close to this ideal as possible.
2. Bypassing
For good performance, VCC must be free of noise and
ripple. Any changes in the VCC voltage with respect to
analog ground during a conversion cycle can induce errors
16
21 0
OUTPUT PORT
3
SERIAL DATA
3
MPU
CS
LTC1283
3
CS
LTC1283
3
CS
LTC1283
3-WIRE SERIAL
INTERFACE TO OTHER
PERIPHERALS OR LTC1283s
8 CHANNELS 8 CHANNELS 8 CHANNELS
LTC1283 • F05
Figure 5. Several LTC1283s Sharing One 3-Wire Serial Interface
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