Qdatasheet_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

LTC1325CN View Datasheet(PDF) - Linear Technology

Part Name
Description
MFG CO.
'LTC1325CN' PDF : 24 Pages View PDF
Prev 21 22 23 24
LTC1325
APPLICATIONS INFORMATION
idle mode to minimize noise. The microprocessor
should either disregard readings or wait for a second
or so before taking a reading. This is to allow VCELL to
decay to the correct cell voltage. The worst case time
constant is 150k(CF).
10. Prior to the first START command, the battery divider
setting may be incorrect so that CF may charge to a
voltage that causes EDV, BATR or MCV faults. The
worst case time constant is as in (9). The micropro-
cessor should check faults during the transmission of
a START command and resend the START command
again when CF has been given enough time to charge
up to the correct value.
MICROPROCESSOR INTERFACES
The LTC1325 can interface directly to either synchronous,
serial or parallel I/O ports of most popular microproces-
sors. With a parallel port, 3 or 4 I/O lines can be pro-
grammed to form a serial link to the LTC1325.
Motorola SPI (68HC11)
The 68HC11 has a dedicated synchronous serial interface
called the Serial Peripheral Interface (SPI) which transfers
data with MSB-first and in 8-bit increments. To communicate
with this microprocessor, the LTC1325 MSBF control bit
should be set to 1. The SPI has four lines: Master In Slave Out
(MISO), Master Out Slave In (MOSI), Serial Clock (SCK) and
Slave Select (SS). The 68HC11 is configured as a Master by
tying the SS line high. A control byte is written to the Serial
Peripheral Control Register (SPCR) to select master mode,
set baud rate and clock timing relationship. Another byte is
written to the Port D Direction Register (DDRD) to set MOSI,
SCK and bit 0 (CS of LTC1325) as outputs. The 68HC11
clocks in data from the LTC1325 simultaneously under the
control of SCK. The microprocessor transmits the LTC1325
command word in 4 bytes. This is followed by 2 more dummy
bytes (with all bits set low) in order to clock in the remaining
LTC1325 ADC and status bits.
This software example allows you to verify communica-
tions with the LTC1325. The command word configures
the LTC1325 to perform an A/D conversion on the general
purpose VIN input. VIN can be tied to GND or REG or to a
wiper on a potentiometer between these two. Table 1
illustrates a complete 6-byte exchange. Note that the first
byte is padded with zeroes to align the A/D data and status
with byte boundaries.
SPCR = (SPIE = 0, SPE = 1, DWOM = 0, MSTR = 1,
CPOL = 0, CPHA = 0, SPR1 = 0, SPR0 = 1)
DDRD = (BIT7 = 0, BIT6 = 0, DDR5 = 1, DDR4 = 1,
DDR3 = 1, DDR2 = 0, DDR1 = 0, DDR0 = 1)
Table 1. 6-Byte Exchange SPI Communication with LTC1325
5V
68HC11
SS
SCK
MOSI
PORTD.0
MISO
LTC1325
CLK
DIN
CS
DOUT
0
0
0
0
0
0 START MOD0 BYTE #1 TX
X
X
X
X
X
X
X
X BYTE #1 RX
MOD1
SGL/
DIFF
MSBF
DS0
DS1
DS2
DIV0 DIV1 BYTE #2 TX
X
X
X
X
X
X
X
X BYTE #2 RX
DIV2 DIV3 PS DR0 DR1 DR2 FSCLR TO0 BYTE #3 TX
X
X
X
X
X
X
X
X BYTE #3 RX
TO1 TO2 VR0 VR1 0
0
0
0 BYTE #4 TX
X
X
X
X
X
0
D9 D8 BYTE #4 RX
X
X
X
X
X
X
X
X BYTE #5 TX
D7 D6 D5 D4 D3 D2 D1 D0 BYTE #5 RX
X
X
X
X
X
X
X
X BYTE #6 TX
BATP BATR FMCV FEVD FHTF FLTF t0UT FS BYTE #6 RX
X = DON’T CARE
LTC1325 • AI01
22
Share Link: GO URL

All Rights Reserved © qdatasheet.com  [ Privacy Policy ] [ Contact Us ]