APPLICATIONS INFORMATION
LABEL MNEMONIC OPERAND
LDAA
STAA
LDAA
STAA
LDX
CSLOW BCLR
LDAA
STAA
LOOP1 TST
BPL
LDAA
STAA
LOOP2 TST
BPL
LDAA
STAA
LOOP3 TST
BPL
LDAA
STAA
#$51
$1028
#$39
$1009
#$1000
$08,X,#$01
#$02
$102A
$1029
LOOP1
#$24
$102A
$1029
LOOP2
#$03
$102A
$1029
LOOP3
#$C0
$102A
COMMENTS
Write control byte to the SPCR
Setup Port D DDRD
Port D Bit 0 is CS
Load port base ADDR
Take CS low
Send Byte #1 (MSB) with
START bit
Check for SPI transfer
complete bit
Send Byte 2
Check for SPI transfer
complete bit
Send Byte 3
Check for SPI transfer
complete bit
Send Byte 4
LTC1325
LABEL MNEMONIC OPERAND
LOOP4
LOOP5
LOOP6
TST
BPL
LDAA
ANDA
STAA
LDAA
STAA
TST
BPL
LDAA
STAA
LDAA
STAA
TST
BPL
LDAA
STAA
BSET
BRA
$1029
LOOP4
$102A
#$03
HIDATA
#$00
$102A
$1029
LOOP5
$102A
LODATA
#$00
$102A
$1029
LOOP6
$102A
STATUS
$08,X,#$01
CSLOW
COMMENTS
Check for SPI transfer
complete bit
Get A/D high byte
Mask off unwanted bits
Store in user memory
Send dummy Byte #1
Check for SPI transfer
complete bit
Get A/D low byte
Store in user memory
Send dummy Byte #2
Check for SPI transfer
complete bit
Get STATUS byte
Store in user memory
Raise CS high
Loop for continuous readings
TYPICAL APPLICATION
NOTE 1
NOTE 2
C1
1µF
R11
220Ω
1/2W
D4
1N4744A
15V
MPU
(e.g. 8051)
p1.4
p1.3
p1.2
R1
R2
CREG
4.7µF
R3
R4
REG
DOUT
DIN
CS
CLK
LTF
MCV
HTF
GND
VDD
PGATE
DIS
VBAT
TBAT
TAMB
VIN
SENSE
FILTER
LTC1325
CF
1µF
Wide Voltage Battery Charger
NOTE 1
NOTE 3
D3
R12
1N4740A 100k
C2
0.1µF
VDC
25V
MBR320
NOTE 7
P1
D1
IRF9Z30 1N5818
L1
62µH
R13
R6
NOTE 6
C5
0.1µF
THERM 2
R5
THERM 1
R7
R14
100Ω
C4
22µF
VBAT
RDIS
NOTE 5 R9
R10
N1
IRF830
C3
500pF
R8
100Ω
RSENSE
RTRK
NOTE 1
NOTE 4
D2
1N4744A
15V
NOTE 1: NEEDED WHEN VDC > 16V OR MAXIMUM
BATTERY VOLTAGE, VBAT > 16V.
NOTE 2: REGULATOR. OMIT THIS BLOCK AND SHORT
VDD TO VDC WHEN VDC < 16V.
NOTE 3: LEVEL SHIFTER. OMIT THIS BLOCK AND SHORT
PGATE TO P1 GATE WHEN VDC < 16V.
NOTE 4: ZENER TO CLAMP VBAT TO BELOW VDD.
OMIT WHEN VDC < 16V.
NOTE 5: EXTERNAL BATTERY DIVIDER. NEEDED WHEN
MAXIMUM BATTERY VOLTAGE, VBAT > 16V.
NOTE 6: VIN IS AN UNCOMMITTED A/D CHANNEL.
NOTE 7: OPTIONAL DIODE TO PREVENT BATTERY
DRAIN WHEN THE CHARGING SUPPLY IS POWERED
DOWN (SEE SECTION 2, HARDWARE DESIGN
PROCEDURE).
1325 TA02
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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