LTC1409 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1409' PDF : 20 Pages View PDF
LTC1409
WU
POWER REQUIRE E TS (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ISS
Negative Supply Current
Nap Mode
Sleep Mode
CS High
q
CONVST = CS = RD = SHDN = 0V, NAP/SLP = 5V
CONVST = CS = RD = SHDN = 0V, NAP/SLP = 0V
10
15
mA
10
µA
1
µA
PDISS
Power Dissipation
Nap Mode
Sleep Mode
q
CONVST = CS = RD = SHDN = 0V, NAP/SLP = 5V
CONVST = CS = RD = SHDN = 0V, NAP/SLP = 0V
WU
TI I G CHARACTERISTICS (Note 5)
80
120
mW
3.8
6
mW
0.01
mW
SYMBOL
fSAMPLE(MAX)
tCONV
tACQ
t1
t2
t3
t4
t5
t6
PARAMETER
CONDITIONS
Maximum Sampling Frequency
Conversion Time
Acquisition Time
CS to RD Setup Time
(Notes 9, 10)
CS↓ to CONVST↓ Setup Time
(Notes 9, 10)
NAP/SLP↓ to SHDN↓ Setup Time (Notes 9, 10)
SHDN↑ to CONVST↓ Wake-Up Time (Note 10)
CONVST Low Time
(Notes 10, 11)
CONVST to BUSY Delay
CL = 25pF
t7
Data Ready Before BUSY↑
t8
Delay Between Conversions
(Note 10)
t9
Wait Time RD↓ After BUSY↑
t10
Data Access Time After RD↓
CL = 25pF
CL = 100pF
t11
Bus Relinquish Time
0°C ≤ TA ≤ 70°C
– 40°C ≤ TA ≤ 85°C
t12
RD Low Time
t13
CONVST High Time
t14
Aperture Delay of Sample-and-Hold
The q indicates specifications which apply over the full operating
temperature range; all other limits and typicals TA = 25°C.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below VSS or above VDD, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below VSS or above VDD without latch-up.
Note 4: When these pin voltages are taken below VSS they will be clamped
by internal diodes. This product can handle input currents greater than
100mA below VSS without latchup. These pins are not clamped to VDD.
MIN
TYP
MAX
UNITS
q 800
kHz
q
900
1250
ns
q
150
ns
q0
ns
q 10
ns
q 10
ns
200
ns
q 50
ns
10
ns
q
60
ns
20
35
ns
q 15
ns
q 40
ns
q –5
ns
15
35
ns
q
45
ns
20
45
ns
q
60
ns
8
30
ns
q
35
ns
q
40
ns
q
t10
ns
q 50
ns
– 1.5
ns
Note 5: VDD = 5V, fSAMPLE = 800kHz, tr = tf = 5ns unless otherwise
specified.
Note 6: Linearity, offset and full-scale specifications apply for a single-
ended +AIN input with –AIN grounded.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: Bipolar offset is the offset voltage measured from – 0.5LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
4
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