LTC1421 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1421' PDF : 24 Pages View PDF
LTC1421/LTC1421-2.5
APPLICATIONS INFORMATION
When CON1 and CON2 are both forced to ground for more
than 20ms, the LTC1421 assumes that the board is fully
connected to the host and power-up can begin. When
VCCLO and VCCHI exceed the 2.45V undervoltage lockout
threshold, the 20µA current reference is connected from
RAMP to GND, the charge pumps are turned on and CPON
is forced high (time point 4). VOUTHI and VOUTLO begin to
ramp up. When VOUTLO exceeds the reset threshold volt-
age, PWRGD will immediately be forced high (time point
5). After a 200ms delay, RESET will be pulled high and
DISABLE will be pulled low, enabling the data bus (time
point 6).
Ground Sense Comparator
When POR is pulled low for more than 20ms, GATELO and
GATEHI are pulled to ground and VOUTLO and VOUTHI will
be discharged. If POR is pulled back high while VOUTLO
and VOUTHI are still ramping down, the discharge will
continue. When they drop below the VTRIP point, a power-
up sequence will begin automatically. The trip point poten-
tial for LTC1421 is set at 0.1V and 2.5V for LTC1421-2.5.
In applications, where either VOUTLO or VOUTHI might be
forced above 100mV before power-up, the LTC1421-2.5
should be used. This could occur when leakage through
the body diode of the logic chips keeps VOUTLO high or in
the case where logic lines are precharged.
In other applications, where outputs need to drop to near
ground potential before ramping up again to ensure proper
initial state for the logic chips, the LTC1421 should be
used.
Power-On Reset Timing
The POR input is used to completely cycle the power
supplies on the board or to reset the electronic circuit
breaker feature. The POR pin can be connected to a
grounded push button, toggle switch or a logic signal
from the host. When POR is pulled low for more than
20ms, a power-on reset sequence begins (Figure 15,
VCCHI
VCCLO
DISABLE
CON1
CON2
CPON
1
2
20ms
3
45
32µs
6
7
200ms
GATEHI
VOUTHI
GATELO
VOUTLO
VTH2
VTH1
PWRGD
RESET
FAULT
POR
1421 F15
Figure 15. Power-On Reset Timing
14
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