LTC1553L View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC1553L
Linear Technology
'LTC1553L' PDF : 20 Pages View PDF
LTC1553L
APPLICATIONS INFORMATION
OPTIONAL FOR VIN > 5V
1N5243B
13V
2 PVCC
LTC1553L
1N5817 VIN
0.1µF
+
CIN
G1
20
Q1
LO
VOUT
G2
+
1
Q2
COUT
1553L F07
Figure 7. Doubling Charge Pump
If the OUTEN pin is low, G1 and G2 are both held low to
prevent output voltage undershoot. As VCC and PVCC
power up from a 0V condition, an internal undervoltage
lockup circuit prevents G1 and G2 from going high until
VCC reaches about 3.5V. If VCC powers up while PVCC is at
ground potential, the SS is forced to ground potential
internally. SS clamps the COMP pin low and prevents the
drivers from turning on. On power-up or recovery from
thermal shutdown, the drivers are designed such that G2
is held low until G1 first goes high.
Power MOSFETs
Two N-channel power MOSFETs are required for most
LTC1553L circuits. Logic level MOSFETs should be used
and they should be selected based on on-resistance con-
siderations. RDS(ON) should be chosen based on input and
output voltage, allowable power dissipation and maxi-
mum required output current. In a typical LTC1553L buck
converter circuit the average inductor current is equal to
the output load current. This current is always flowing
through either Q1 or Q2 with the power dissipation split up
according to the duty cycle:
( ) DC Q1 = VOUT
VIN
( ) ( ) DC Q2 = 1− VOUT = VIN − VOUT
VIN
VIN
The RDS(ON) required for a given conduction loss can now
be calculated by rearranging the relation P = I2R.
( ) ( ) RDS ON Q1 =
( ) ( ) PMAX Q1
=
VIN
PMAX
Q1


2
2
[ ( )]( ) ( )( ) DC Q1 IMAX
VOUT IMAX
( ) ( ) RDS ON Q2 =
( ) PMAX Q2
=
2
( ) VIN
PMAX
Q2


2
[ ( )]( ) ( )( ) DC Q2 IMAX
VIN − VOUT IMAX
PMAX should be calculated based primarily on required
efficiency or allowable thermal dissipation. A typical high
efficiency circuit designed for Pentium II with a 5V input
and a 2.8V, 11.2A output might allow no more than 4%
efficiency loss at full load for each MOSFET. Assuming
roughly 90% efficiency at this current level, this gives a
PMAX value of:
[(2.8)(11.2A/0.9)(0.04)] = 1.39W per FET
and a required RDS(ON) of:
(5V)(1.39W)
( )( ) ( ) RDS ON Q1 =
= 0.019Ω
2
2.8V 11.2A
( )( ) 5V 1.39W
( ) RDS ON Q2 =
= 0.025Ω
2
( )( ) 5V − 2.8V 11.2A
Note also that while the required RDS(ON) values suggest
large MOSFETs, the dissipation numbers are only 1.39W
per device or less––large TO-220 packages and heat sinks
are not necessarily required in high efficiency applica-
tions. Siliconix Si4410DY or International Rectifier IRF7413
(both in SO-8) or Siliconix SUD50N03 or Motorola
MTD20N03HDL (both in D PAK) are small footprint sur-
face mount devices with RDS(ON) values below 0.03Ω at 5V
of gate drive that work well in LTC1553L circuits. With
higher output voltages, the RDS(ON) of Q1 may need to be
significantly lower than that for Q2. These conditions can
often be met by paralleling two MOSFETs for Q1 and using
a single device for Q2. Note that using a higher PMAX value
in the RDS(ON) calculations will generally decrease MOSFET
cost and circuit efficiency while increasing MOSFET heat
sink requirements.
13
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