LTC1735-1 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1735-1' PDF : 28 Pages View PDF
LTC1735-1
APPLICATIO S I FOR ATIO
Table 1
PGOOD PIN
DC Voltage: 0V to 0.7V
Resistor Pull-Up to
INTVCC (or Other DC
Voltage Less Than INTVCC)
Resistor to Ext Clock:
(0V to 1.5V)
CONDITION
No Power Good Indication
Burst Mode Operation Disabled/Forced
Continuous Current Reversal Enabled
Power Good Indication
Burst Mode, No Current Reversal
When Power is Good
No Power Good Indication
Burst Mode Operation Disabled
No Current Reversal
The circuit shown in Figure 7 provides a power good
output and forces continuous operation. Transistor Q1
keeps the voltage at the PGOOD pin below 0.8V thus
disabling Burst Mode operation. When the window com-
parator indicates the output voltage is not within its 7.5%
window, the base of Q1 is pulled to ground and the power
good output appearing at the collector of Q2 goes low.
INTVCC
PGOOD
PIN 4
470k 100k 10k
POWER
GOOD
Q2
Q1
1735-1 F07
Figure 7. Forced Continuous Operation with Power Good Indication
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc., are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1735-1 circuits: 1) LTC1735-1 VIN current,
2) INTVCC current, 3) I2R losses, 4) Topside MOSFET
transition losses.
1. The VIN current is the DC supply current given in the
electrical characteristics which excludes MOSFET driver
and control currents. VIN current results in a small
(< 0.1%) loss that increases with VIN.
2. INTVCC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTVCC to ground. The resulting dQ/dt is a current
out of INTVCC that is typically much larger than the
control circuit current. In continuous mode, IGATECHG =
f(QT + QB), where QT and QB are the gate charges of the
topside and bottom-side MOSFETs.
By powering EXTVCC from an output-derived source (or
other high efficiency source), the additional VIN current
resulting from the driver and control currents will be
scaled by a factor of (Duty Cycle)/(Efficiency). For
example, in a 15V to 1.8V application, 10mA of INTVCC
current results in approximately 1.2mA of VIN current.
This reduces the midcurrent loss from 10% or more (if
the driver was powered directly from VIN) to only a few
percent.
3. I2R losses are predicted from the DC resistances of the
MOSFETs, inductor and current shunt. In continuous
mode, the average output current flows through L and
RSENSE, but is “chopped” between the topside main
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same RDS(ON), then
the resistance of one MOSFET can simply be summed
with the resistances of L and RSENSE to obtain I2R
losses. For example, if each RDS(ON) = 0.02Ω, RL =
0.03Ω, and RSENSE = 0.01Ω, then the total resistance is
0.06Ω. This results in losses ranging from 3% to 17%
as the output current increases from 1A to 5A for a 1.8V
output, or 4% to 20% for a 1.5V output. Efficiency
varies as the inverse square of VOUT for the same
external components and power level. I2R losses cause
the efficiency to drop at high output currents.
4. Transition losses apply only to the topside MOSFET(s),
and only become significant when operating at high
input voltages (typically 12V or greater). Transition
losses can be estimated from:
Transition Loss = (1.7) VIN2 IO(MAX) CRSS f
19
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