LTC1864L/LTC1865L
W
FUNCTIONAL BLOCK DIAGRA
PIN NAMES IN
PARENTHESES
REFER TO LTC1865L
CONVERT
CLK
VCC
BIAS AND
SHUTDOWN
IN+
(CH0)
IN –
(CH1)
+
16-BIT
SAMPLING
–
ADC
CONV (SDI) SCK
SERIAL
SDO
PORT
DATA IN
16 BITS
DATA OUT
GND
VREF
1864/65 BD
TEST CIRCUITS
Load Circuit for tdDO, tr, tf, tdis and ten
TEST POINT
3k
SDO
20pF
VCC tdis WAVEFORM 2, ten
tdis WAVEFORM 1
1864 TC01
Voltage Waveforms for ten
CONV
SDO
1864 TC03
ten
Voltage Waveforms for SDO Delay Times, tdDO and thDO
SCK
VIL
tdDO
thDO
SDO
8
VOH
VOL
1864 TC02
Voltage Waveforms for SDO Rise and Fall Times, tr, tf
SDO
tr
VOH
VOL
tf
1864 TC04
Voltage Waveforms for tdis
CONV
VIH
SDO
WAVEFORM 1
(SEE NOTE 1)
90%
tdis
SDO
WAVEFORM 2
(SEE NOTE 2)
10%
NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL
NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL
1864 TC05
sn18645L 18645Lfs