LTC2941CDCB-TRPBF View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC2941CDCB-TRPBF' PDF : 16 Pages View PDF
LTC2941
APPLICATIONS INFORMATION
Alert Response Protocol
In a system where several slaves share a common inter-
rupt line, the master can use the alert response address
(ARA) to determine which device initiated the interrupt
(Figure 9).
The master initiates the ARA procedure with a START con-
dition and the special 7-bit ARA bus address (0001100)
followed by the read bit (R) = 1. If the LTC2941 is asserting
the AL/CC pin in alert mode, it acknowledges and responds
by sending its 7-bit bus address (1100100) and a 1. While
S ADDRESS W A REGISTER A DATA A P
1100100 0 0 01h 0 FCh 0
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
2941 F05
A: ACKNOWLEDGE (LOW)
A: NOT-ACKNOWLEDGE (HIGH)
R: READ BIT (HIGH)
W: WRITE BIT (LOW)
S: START CONDITION
P: STOP CONDITION
Figure 5. Writing FCh to LTC2941 Control Register (B)
S ADDRESS W A REGISTER A DATA A DATA A P
1100100 0 0 02h 0 F0h 0 01h 0
2941 F06
Figure 6. Writing F001h to the LTC2941 Accumulated Charge Registers (C, D)
S ADDRESS W A REGISTER A S ADDRESS R A DATA A P
1100100 0 0 00h 0
1100100 1 0 81h 1
2941 F07
Figure 7. Reading the LTC2941 Status Register (A)
S ADDRESS W A REGISTER A S ADDRESS R A DATA A DATA A P
1100100 0 0 02h 0
1100100 1 0 80h 0 01h 1
2941 F08
Figure 8. Reading the LTC2941 Accumulated Charge Registers (C, D)
S ALERT RESPONSE ADDRESS R A DEVICE ADDRESS A P
0001100
10
11001001
1
2941 F09
Figure 9. LTC2941 Serial Bus SDA Alert Response Protocol
2941f
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