LTC4156IUFD View Datasheet(PDF) - Linear Technology

Part Name

Description

MFG CO.

LTC4156IUFD

Dual-Input Power Manager/3.5A LiFePO4 Battery Charger with I2C Control and USB OTG

Linear Technology 

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LTC4156

OPERATION

I2C

Table 2. I2C Map

SUB

REGISTER ACCESS ADDRESS D7

D6

D5

D4

REG0 WRITE/

0x00

READBACK

DISABLE

INPUT

UVCL

0

RESERVED

LOCKOUT

USB OTG ID

PIN

D3

D2

D1

D0

USB CURRENT LIMIT

REG1 WRITE/

0x01

READBACK

INPUT

PRIORITY

SAFETY TIMER

WALL CURRENT LIMIT

REG2 WRITE/

0x02

READBACK

CHARGE CURRENT

FLOAT VOLTAGE

C/x DETECTION

REG3

READ

0x03

CHARGER STATUS

ID PIN

DETECTION

STATUS

BOOST

ENABLE

STATUS

THERMISTOR STATUS

LOW

BATTERY

STATUS

REG4

READ

0x04

EXTERNAL

POWER

GOOD

USBSNS

GOOD

WALLSNS

GOOD

INPUT

CURRENT

LIMIT

ACTIVE

INPUT UVCL

ACTIVE

OVP ACTIVE

OTG FAULT

BAD CELL

FAULT

REG5

READ

0x05

THERMISTOR VALUE

THERMIS-

TOR

WARNING

REG6 WRITE/

0x06

READBACK

CLEAR

INTERRUPT*

DISARM

SHIP-AND-

STORE

ENABLE

CHARGER

INTERRUPTS

ENABLE

FAULT

INTERRUPTS

ENABLE

EXTERNAL

POWER

INTERRUPTS

ENABLE

USB OTG

INTERRUPTS

ENABLE

INPUT

CURRENT

LIMIT

INTERRUPTS

ENABLE

INPUT UVCL

INTERRUPTS

ENABLE

USB

On-The-Go

0

RESERVED

MODE*

REG7 WRITE

0x07

ARM SHIP-

AND-STORE

MODE**

0

0

0

0

0

0

0

0

REQUIRED REQUIRED REQUIRED REQUIRED REQUIRED REQUIRED REQUIRED REQUIRED

*Interrupts are cleared and ship-and-store mode is disarmed during the acknowledge clock cycle following a full data byte written to sub address 0x06.

Reading data from sub address 0x06 has no effect.

**Ship-and-store mode is armed during the acknowledge clock cycle following a full data byte written to sub address 0x07. The data written to sub

address 0x07 is ignored. Reading from sub address 0x07 has no effect and the returned data is undefined, independent of the arming state of

ship-and-store mode.

4156f

17

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