LTC4156IUFD View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC4156IUFD
Linear Technology
'LTC4156IUFD' PDF : 52 Pages View PDF
LTC4156
OPERATION
Battery Float Voltage Regulation
When the battery charger is enabled, the switching regula-
tor will reduce its output power to prevent VBATSNS from
exceeding the programmed battery float voltage, VFLOAT.
The float voltage may be selected from among four pos-
sible choices via the I2C interface using bits VFLOAT[1:0].
Refer to Table 11.
Battery Charge Current Regulation and Low Cell Trickle
Charge
The switching regulator will also reduce its output power
to limit battery charge current, ICHARGE, to a programmed
maximum value. The battery charge current is programmed
using both a resistor, RPROG, between PROG and ground
to set default maximum charge current plus I2C adjust-
ability to optionally reduce programmed charge current.
The battery charge current loop mirrors a precise fraction
of the battery charge current, IBAT, to the PROG pin, then
reduces switching regulator output power to limit the
resultant voltage, VPROG, to one of fifteen possible servo
reference voltages.
The following expression may be used to determine the
battery charge current at any time by sampling the PROG
pin voltage.
IBAT
=
VPROG
RPROG
• 1000
This expression may also be used to calculate the required
value of RPROG for any desired charge current. The resis-
tor value required to program default maximum charge
current may be found by substituting VPROG = 1.200 and
solving for RPROG. The other fourteen settings are I2C
selectable using ICHARGE[3:0] and reduce the charge
current in 6.25% steps. The resulting limits may be found
by substituting RPROG and the relevant VPROG servo volt-
age from Table 10.
The maximum charge current should be set based on the
cell size and maximum charge rate without regard to input
current setting or input power source.
The LTC4156 monitors the voltage across the external
PMOS transistor and automatically reduces the cur-
rent regulation servo voltage at VPROG to limit power
dissipation in the transistor. During normal operation, the
PMOS channel is fully enhanced and power dissipation is
typically under 100mW. Starting when the battery voltage
is below approximately 2.94V, the charge current servo
voltage will be gradually reduced from its I2C programmed
value to a minimum value between 75mV and 100mV when
the battery is below VLOWBAT, typically 2.8V. This charge
current reduction has the combined effect of protecting the
external PMOS transistor from damage due to excessive
heat, while also trickle charging the excessively depleted
cell to maximize battery health and lifetime. Peak power
dissipation in the external PMOS transistor is limited
to approximately 700mW. Figure 1 shows the relation-
ship between battery voltage, charge current and power
dissipation.
2.5
0.8
VFLOAT = 3.8V
0.7
2.0
0.6
1.5
0.5
0.4
1.0
0.3
0.2
0.5
0.1
0
0
2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
BATTERY VOLTAGE (V)
ICHARGE 100% MODE (2.4A)
ICHARGE 50% MODE (1.2A)
PDISS 100% MODE (2.4A)
PDISS 50% MODE (1.2A)
4156 F01
Figure 1. VOUT Minimum Voltage Regulation
VOUT Voltage Regulation
A third control loop reduces power delivery by the switch-
ing regulator in response to the voltage at VOUT, which
has a nonprogrammable servo voltage of 4.35V. When the
battery charger is enabled, VOUT is connected to BATSNS
through the internal charge current sense resistor and
the external PMOS battery FET. The two node voltages
will differ only by the I • R drop through the two devices,
effectively keeping VOUT below its servo point for the
duration of the charge cycle.
The LTC4156 will attempt to prevent VOUT from falling
below approximately 3.19V when the battery is deeply
4156f
19
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