LTC5587IDD View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC5587IDD' PDF : 20 Pages View PDF
LTC5587
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = VDD = OVDD = 3.3V, VREF = 1.8V, EN = 3.3V, fSMPL =
fSMPL(MAX) and fSCK = fSCK(MAX) unless otherwise noted. Test circuit is shown in Figure 1.
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
Output Variation vs Temperature
Normalized to Output at 25°C; PIN = –30dBm to 6dBm
±1
dB
Output Variation vs Temperature
Normalized to Output at 25°C; PIN = –27dBm to –10dBm
±0.5
dB
Deviation from CW Response;
PIN = –34dBm to –4dBm
WiMax OFDMA Preamble
WiMax OFDM Burst
±0.1
dB
±0.5
dB
Detector Analog Output
Output DC Voltage at VOUT
Output Impedance
No Signal Applied to RF Input
Internal Series Resistor Allows for Off-Chip Filter Cap
180
mV
300
Ω
Output Current Sourcing/Sinking
5/5
mA
Rise Time (1000pF on VOUT)
Fall Time (1000pF on VOUT)
Power Supply Rejection Ratio (Note 6)
0.2V to 1.6V, 10% to 90%, fRF = 2140MHz
1.6V to 0.2V, 10% to 90%, fRF = 2140MHz
For CW RF Input Over Operating Input Power Range
1
μsec
8
μsec
49
dB
Integrated Output Voltage Noise
Peak-to-Peak ADC Output Noise
ADC Resolution
1 to 6.5 kHz Integration BW, PIN = 0dBm CW
CFILT = 1000pF, PIN = 0dBm CW
150
μVRMS
11
LSB
ADC Resolution
(No Missing Codes)
l 12
Bits
Differential Linearity Error
Measurement Resolution
ADC Digital Timing
EN = 0V, Voltage on VOUT = 0V to 1.8V, VREF = 1.8V
l
1LSB = VREF/(4096 • 32mV/dB), VREF = 1.8V
±0.25
0.014
±1
LSB
dB/Bit
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fSAMPL(MAX)
fSCK
tSCK
tTHROUGHPUT
tACQ
tCONV
t1
t2
t3
t4
t5
t6
t7
t8
Maximum Sampling Frequency
Shift Clock Frequency
Shift Clock Period
Minimum Throughput Time, tACQ + tCONV
Acquisition Time
Conversion Time
Minimum Positive CONV Pulse Width
SCK↑ Setup Time After CONV↓
SDO Enabled Time After CONV↓
SDO Data Valid Access Time After SCK↓
SCK Low Time
SCK High Time
SDO Data Valid Hold Time After SCK↓
SDO Into Hi-Z State Time After CONV↑
(Notes 8, 9)
(Notes 8, 9)
(Note 8)
(Note 8)
(Notes 8, 9)
(Notes 8, 9, 10)
(Note 7)
(Note 7)
(Notes 8, 9, 10)
(Notes 8, 9)
l 500
kHz
l
50
MHz
l 20
ns
l
2
μs
l 0.5
μs
l 1.5
μs
l 1.5
μs
l 16
ns
l
16
ns
l
8
ns
l 40%
tSCK
l 40%
tSCK
l
4
ns
6
ns
ADC Digital Inputs and Outputs
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
SCK, CONV Logic High Input
VIL
SCK, CONV Logic Low Input
IIH
Logic High Input Current
SCK, CONV = VDD
IIL
Logic Low Input Current
SCK, CONV = 0V
l
2
l
l
l –2.5
V
0.8
V
2.5
μA
μA
5587f
4
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