M41T62 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M41T62' PDF : 33 Pages View PDF
M41T62/63/64/65
Clock operation
Write timing
When writing to the device, the data is shifted into the M41T62's I2C interface on the rising
edge of the SCL signal. As shown in Figure 20, on the 8th clock cycle, the data is
transferred from the I2C block into whichever register is being pointed to by the address
pointer (not shown).
Writes to the clock registers (addresses 0-7)
Data written to the clock registers (addresses 0-7) is held in the buffer registers until the
address pointer increments to 8, or an I2C stop condition occurs, at which time the data in
the buffer/registers is simultaneously copied into the counters, and then the clock is re-
started.
Doc ID 10397 Rev 14
19/41
Share Link: 
