M41T81 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M41T81' PDF : 29 Pages View PDF
Clock operation
M41T81
3.4
Note:
Setting alarm clock registers
Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go
off at a prescribed time on a specific month, date, hour, minute, or second or repeat every
year, month, day, hour, minute, or second. It can also be programmed to go off while the
M41T81 is in the battery backup mode to serve as a system wake-up call.
Bits RPT5-RPT1 put the alarm in the repeat mode of operation. Table 3 on page 17 shows
the possible configurations. Codes not listed in the table default to the once per second
mode to quickly alert the user of an incorrect alarm setting.
When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5-RPT1, the AF (alarm flag) is set. If AFE (alarm flag enable) is also set (and
SQWE is '0.'), the alarm condition activates the IRQ/FT/OUT/SQW pin.
If the address pointer is allowed to increment to the flag register address, an alarm condition
will not cause the interrupt/flag to occur until the address pointer is moved to a different
address. It should also be noted that if the last address written is the “alarm seconds,” the
address pointer will increment to the flag address, causing this situation to occur.
The IRQ/FT/OUT/SQW output is cleared by a READ to the flags register as shown in
Figure 12. A subsequent READ of the flags register is necessary to see that the value of the
alarm flag has been reset to '0.'
The IRQ/FT/OUT/SQW pin can also be activated in the battery backup mode. The
IRQ/FT/OUT/SQW will go low if an alarm occurs and both ABE (alarm in battery backup
mode enable) and AFE are set. Figure 13 illustrates the backup mode alarm timing.
Figure 12. Alarm interrupt reset waveform
0Eh
0Fh
10h
ACTIVE FLAG
IRQ/FT/OUT/SQW
HIGH-Z
AI04617
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Doc ID 7529 Rev 10
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