M7010R
68-bit Logical SEARCH
The logical, 68-bit SEARCH operation is shown in
Figure 26. The entire table of 68-bit entries is com-
pared to a 68-bit word K (presented on the DQ Bus
in both Cycles A and B of the command) using the
GMR and the local mask bits. The effective GMR
is the 68-bit word specified by the identical value
in both even and odd GMR pairs selected by the
GMR Index in the command’s Cycle A. The 68-bit
word K (presented on the DQ Bus in both Cycles
A and B of the command) is also stored in both
even and odd comparand register pairs selected
by the Comparand Register Index in the com-
mand’s Cycle B. In a x68 configuration, only the
even comparand register can subsequently be
used by the LEARN command. The word K (pre-
sented on the DQ Bus in both Cycles A and B of
the command) is compared with each entry in the
table, starting at location “0.” The first matching
entry’s location, address “L,” is the winning ad-
dress that is driven as part of the SRAM address
on the SADR[21:0] lines.
Figure 26. x68 Table with One Device
67
0
67
0
Comparand Register (even)
K
Comparand Register (odd)
K
Location 67
address
0
1
2
3
L
GMR
K
0
(First matching entry)
16383
CFG = 00000000
(68-bit Configuration)
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