M7010R
Figure 42. Timing for Arbitration for Two or More Blocks for the Last Device
Cycle 2
Cycle 4
Cycle 6
Cycle 8
Cycle 10
Cycle 1
Cycle 3
Cycle 5
Cycle 7
Cycle 9
CLK 2X
PHS_L
CMDV
CMD
CMD[8:2]
Search1
Search3
Search2
Search4
AB
DQ
SADR[21:0]
D0 D1 D0 D1 D0 D1 D0 D1
3FFFFF
A1 A2 A3 A4 3FFFFF
CE_L
WE_L
OE_L
LHO
BHO
SSV
Miss
Hit
Hit Hit
SSF
TLSZ = 10, HLAT = 000, LRAM = 1, LDEV = 1
Arbitration Cycle within Blocks
AI04294
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