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MAS35X9F View Datasheet(PDF) - Micronas

Part Name
Description
MFG CO.
'MAS35X9F' PDF : 92 Pages View PDF
MAS 35x9F
DATA SHEET
2.6. Power Supply Concept
The MAS 35x9F was designed for minimal power dis-
sipation. In order to optimize the battery management
in portable players, two DC/DC converters were imple-
mented to supply the complete portable audio player
with regulated voltages.
2.6.1. Power Supply Regions
The MAS 35x9F has five power supply regions.
The VDD/VSS pin pair supplies all digital parts includ-
ing the DSP core, the XVDD/XVSS pin pair is con-
nected to the digital signal pin output buffers, the
AVDD0/AVSS0 supply is for the analog output amplifi-
ers, AVDD1/AVSS1 for all other analog circuits like
clock oscillator, PLL circuits, system clock synthesizer
and A/D and D/A converters. The I2C interface has an
own supply region via pin I2CVDD. Connecting this to
the microcontroller supply assures that the I2C bus
always works as long as the microcontroller is alive so
that the operating modes can be selected.
Beside these regions, the DC/DC converters have
start-up circuits of their own which get their power via
pin VSENSx.
2.6.2. DC/DC Converters
The MAS 35x9F has two embedded high-performance
step-up DC/DC converters with synchronous rectifiers
to supply both the DSP core itself and external circuitry
such as a controller or flash memory at two different
voltage levels. An overview is given in Fig. 2–7 on
page 13.
The DC/DC converters are designed to generate an
output voltage between 2.0 V and 3.5 V which can be
programmed separately for each converter via the I2C
interface (see table 3.3). Both converters are of boot-
strapped type allowing to start up from a voltage down
to 0.9 V for use with a single battery or NiCd/NiMH cell.
The default output voltages are 3.0 V. Both converters
are enabled with a high level at pin DCEN and
enabled/disabled by the I2C interface.
The MAS 35x9F DC/DC converters feature a constant-
frequency, low noise pulse width modulation (PWM)
mode and a low quiescent current, pulse frequency
modulation (PFM) mode for improved efficiencies at
low current loads. Both modes – PWM or PFM – can
be selected independently for each converter via I2C
interface. The default mode is PWM.
In PWM mode the switching frequency of the power-
MOSFET-switches is derived from the crystal oscilla-
tor. Switching harmonics generated by constant fre-
quency operation are consistent and predictable.
When the audio codec is enabled, the switching fre-
quency of the converters is synchronised to the audio
codec clock to avoid interferences into the audio band.
The actual switching frequency can be selected via the
I2C-interface between 300 kHz and 580 kHz (for
details see DCFR Register in Table 3–3 on page 24).
In the PFM operation mode, the switching frequency is
controlled by the converters themselves. It will be just
high enough to service the output load, thus resulting
in the best possible efficiency at low current loads. The
PFM mode does not need a clock signal from the crys-
tal oscillator. If both converters do not use the PWM-
mode, the crystal clock will be shut down as long it is
not needed by other internal blocks.
The synchronous rectifier bypasses the external
Schottky diode to reduce losses caused by the diode
forward voltage providing up to 5% efficiency improve-
ment. By default, the P-channel synchronous rectifier
switch is turned on when the voltage at pin(s) DCSOn
exceeds the converter’s output voltage at pin(s)
VSENSn, and is turned off when the inductor current
drops below a threshold. If one or both converters are
disabled, the corresponding P-channel switch will be
turned on, connecting the battery voltage to the DC/
DC converters output voltage at pin VSENSn. How-
ever, it is possible to individually disable both synchro-
nous rectifier switches by setting the corresponding
bits (bit[8] and [0] in DCCF-register).
If both DC/DC-converters are off, a high signal may be
applied at pin DCEN. This will start the converters in
their default mode (PWM with 3.0 V output voltage).
The PUP signal will change from low to high when
both converters have reached their nominal output
voltage and will return to low when both converters
output voltages have dropped 200 mV below their pro-
grammed output voltage. The signal at pin PUP can be
used to control the reset of an external microcontroller
(see Section 2.11.2. on page 18 for details on the start-
up procedure).
If only DC/DC-converter 1 is used, the output of the
unused converter 2 (VSENS2) must be connected to
the output of converter 1 (VSENS1) to make the PUP
signal work properly. Also, if a DC/DC-converter is not
used (no inductor connected), the pin DCSO must be
left vacant.
12
June 30, 2004; 6251-505-1DS
Micronas
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