Section Number
Title
Page
10.5.8 FLL Lock and Loss-of-Lock Detection ........................................................................184
10.5.9 FLL Loss-of-Clock Detection ......................................................................................185
10.5.10 Clock Mode Requirements ...........................................................................................186
10.5.11 Fixed Frequency Clock .................................................................................................187
10.5.12 High Gain Oscillator .....................................................................................................187
10.6 Initialization/Application Information ..........................................................................................187
10.6.1 Introduction ..................................................................................................................187
10.6.2 Example #1: External Crystal = 32 kHz, Bus Frequency = 4.19 MHz ........................189
10.6.3 Example #2: External Crystal = 4 MHz, Bus Frequency = 20 MHz ............................191
10.6.4 Example #3: No External Crystal Connection, 5.4 MHz Bus Frequency ....................193
10.6.5 Example #4: Internal Clock Generator Trim ................................................................195
Chapter 11
Timer Pulse-Width Modulator (S08TPMV2)
11.1 Introduction ...................................................................................................................................197
11.1.1 Features .........................................................................................................................199
11.1.2 Block Diagram ..............................................................................................................199
11.2 External Signal Description ..........................................................................................................201
11.2.1 External TPM Clock Sources .......................................................................................201
11.2.2 TPMxCHn — TPMx Channel n I/O Pins .....................................................................201
11.3 Register Definition ........................................................................................................................201
11.3.1 Timer x Status and Control Register (TPMxSC) ..........................................................202
11.3.2 Timer x Counter Registers (TPMxCNTH:TPMxCNTL) .............................................203
11.3.3 Timer x Counter Modulo Registers (TPMxMODH:TPMxMODL) .............................204
11.3.4 Timer x Channel n Status and Control Register (TPMxCnSC) ....................................205
11.3.5 Timer x Channel Value Registers (TPMxCnVH:TPMxCnVL) ....................................206
11.4 Functional Description ..................................................................................................................207
11.4.1 Counter .........................................................................................................................207
11.4.2 Channel Mode Selection ...............................................................................................208
11.4.2.1 Input Capture Mode ......................................................................................208
11.4.2.2 Output Compare Mode .................................................................................209
11.4.2.3 Edge-Aligned PWM Mode ...........................................................................209
11.4.3 Center-Aligned PWM Mode ........................................................................................210
11.5 TPM Interrupts ..............................................................................................................................211
11.5.1 Clearing Timer Interrupt Flags .....................................................................................211
11.5.2 Timer Overflow Interrupt Description ..........................................................................211
11.5.3 Channel Event Interrupt Description ............................................................................212
11.5.4 PWM End-of-Duty-Cycle Events .................................................................................212
Chapter 12
Serial Communications Interface (S08SCIV3)
12.1 Introduction ...................................................................................................................................213
12.1.1 Features .........................................................................................................................216
12.1.2 Modes of Operation ......................................................................................................216
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
Freescale Semiconductor
15
PRELIMINARY