MC9S08LC60LK View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'MC9S08LC60LK' PDF : 360 Pages View PDF
Section Number
Title
Page
15.6.1
15.6.2
External Pins and Routing ............................................................................................288
15.6.1.1 Analog Supply Pins ......................................................................................288
15.6.1.2 Analog Reference Pins ..................................................................................289
15.6.1.3 Analog Input Pins .........................................................................................289
Sources of Error ............................................................................................................290
15.6.2.1 Sampling Error ..............................................................................................290
15.6.2.2 Pin Leakage Error .........................................................................................290
15.6.2.3 Noise-Induced Errors ....................................................................................290
15.6.2.4 Code Width and Quantization Error .............................................................291
15.6.2.5 Linearity Errors .............................................................................................291
15.6.2.6 Code Jitter, Non-Monotonicity and Missing Codes ......................................292
Chapter 16
Analog Comparator (S08ACMPV2)
16.1 Introduction ...................................................................................................................................293
16.1.1 ACMP/TPM1 Configuration Information ....................................................................293
16.1.2 AMCPO Availability ....................................................................................................293
16.1.3 Features .........................................................................................................................295
16.1.4 Modes of Operation ......................................................................................................295
16.1.4.1 ACMP in Wait Mode ....................................................................................295
16.1.4.2 ACMP in Stop Modes ...................................................................................295
16.1.4.3 ACMP in Active Background Mode .............................................................295
16.1.5 Block Diagram ..............................................................................................................295
16.2 External Signal Description ..........................................................................................................297
16.3 Register Definition ........................................................................................................................297
16.3.1 ACMP Status and Control Register (ACMPSC) ..........................................................298
16.4 Functional Description ..................................................................................................................299
Chapter 17
Development Support
17.1 Introduction ...................................................................................................................................301
17.1.1 Features .........................................................................................................................301
17.2 Background Debug Controller (BDC) ..........................................................................................302
17.2.1 BKGD Pin Description .................................................................................................302
17.2.2 Communication Details ................................................................................................303
17.2.3 BDC Commands ...........................................................................................................307
17.2.4 BDC Hardware Breakpoint ..........................................................................................309
17.3 On-Chip Debug System (DBG) ....................................................................................................309
17.3.1 Comparators A and B ...................................................................................................310
17.3.2 Bus Capture Information and FIFO Operation .............................................................310
17.3.3 Change-of-Flow Information ........................................................................................311
17.3.4 Tag vs. Force Breakpoints and Triggers .......................................................................311
17.3.5 Trigger Modes ..............................................................................................................312
17.3.6 Hardware Breakpoints ..................................................................................................314
MC9S08LC60 Series Advance Information Data Sheet, Rev. 2
Freescale Semiconductor
19
PRELIMINARY
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