MC9S12DT512 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'MC9S12DT512' PDF : 124 Pages View PDF
MC9S12DP512 Device Guide V01.25
A.7.2 Slave Mode
In Figure A-8 the timing diagram for slave mode with transmission format CPHA=0 is depicted.
SS
(INPUT)
SCK
(CPOL = 0)
(INPUT)
2
SCK
(CPOL = 1)
(INPUT) 10
7
MISO
see
(OUTPUT)
note
1
4
SLAVE MSB
MOSI
(INPUT)
5
6
MSB IN
NOTE: Not defined!
12
4
12
9
BIT 6 . . . 1
BIT 6 . . . 1
13 3
13
11
11
SLAVE LSB OUT
8
SEE
NOTE
LSB IN
Figure A-8 SPI Slave Timing (CPHA=0)
In Figure A-9 the timing diagram for slave mode with transmission format CPHA=1 is depicted.
115
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