MC9S12DT512 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'MC9S12DT512' PDF : 124 Pages View PDF
MC9S12DP512 Device Guide V01.25
Table A-21 Expanded Bus Timing Characteristics
Conditions are shown in Table A-4 unless otherwise noted, CLOAD = 50pF
Num C
Rating
Symbol Min
Typ
Max
32 D NOACC hold time
tNOH
2
-
-
33 D IPIPE[1:0] delay time
tP0D
2
-
7
34 D IPIPE[1:0] valid time to E rise (PWEL–tP0D)
tP0V
11
-
-
35 D IPIPE[1:0] delay time(1) (PWEH-tP1V)
tP1D
2
-
7
36 D IPIPE[1:0] valid time to E fall
tP1V
11
-
-
NOTES:
1. Affected by clock stretch: add N x tcyc where N=0,1,2 or 3, depending on the number of clock stretches.
Unit
ns
ns
ns
ns
ns
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