MCF51QH128 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'MCF51QH128' PDF : 68 Pages View PDF
Pinout
8 Pinout
8.1 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Mux Control module is
responsible for selecting which ALT functionality is available on each pin.
NOTE
• On PTB0, EZP_MS_b is active only during reset. Refer to
the detailed boot description.
• PTC1 is open drain.
64- 48- 44- 32- Default
ALT0
pin pin pin pin
1 — — — VDD
VDD
2 — — — VSS
VSS
3 — — — Disabled Disabled
4 — — — Disabled Disabled
5 1 — — Disabled Disabled
ALT1
PTC6
PTC7
PTD0
6 2 — — Disabled Disabled PTD1
7 3 1 1 Disabled Disabled PTA0
8 4 2 2 Disabled Disabled PTA1
9 5 3 3 Disabled Disabled PTA2
10 6 4 4 Disabled Disabled PTA3
11 7 5 5 ADC0_DP1/ ADC0_DP1/ PTA4
ADC0_SE2 ADC0_SE2
12 8 6 6 ADC0_DM1/ ADC0_DM1/ PTA5
ADC0_SE3 ADC0_SE3
13 9 7 7 VDDA
VDDA
14 10 8 — VREFH VREFH
15 11 9 — VREF_OUT VREF_OUT
16 12 10 — VREFL VREFL
17 13 11 8 VSSA
VSSA
18 14 12 9 DAC0_OUT DAC0_OUT
19 15 13 10 ADC0_DP0/ ADC0_DP0/
ADC0_SE0 ADC0_SE0
20 16 14 11 ADC0_DM0/ ADC0_DM0/
ADC0_SE1 ADC0_SE1
21 17 15 12 VREGIN VREGIN
22 18 16 13 VOUT33 VOUT33
ALT2
ALT3
ALT4
ALT5
ALT6
UART0_TX I2C0_SCL
UART0_RX I2C0_SDA
UART0_CT I2C1_SDA
S_b
UART0_RT I2C1_SCL
S_b
I2C2_SCL
I2C2_SDA
UART1_TX
UART1_RX
UART1_CT I2C2_SCL
S_b
UART1_RT I2C2_SDA
S_b
RGPIO6
RGPIO7
RGPIO8
SPI1_MOSI FBa_AD11
SPI1_MISO FBa_AD12
SPI1_SCLK FBa_AD13
RGPIO9 SPI1_SS FBa_AD14
FTM1_CH0
FTM1_CH1
FTM1_CH2
FTM1_CH3
FTM1_CH4
SPI0_SS
SPI1_SS
SPI1_SCLK
SPI1_MISO
FBa_AD15
FBa_AD16
FTM1_CH5 SPI1_MOSI CLKOUT
ALT7
EzPort
EZP_CLK
EZP_DI
EZP_DO
MCF51QH128 Advance Information Data Sheet, Rev. 0, 05/2011.
Freescale Semiconductor, Inc.
Preliminary
51
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