64-pin
31
43
63
3
30
44
64
11
58
12
57
10
59
9
60
Revision History
Table 35. Module signals by GPIO port and pin (continued)
48-pin
24
47
23
31
48
7
42
8
41
6
43
5
44
44-pin
22
32-pin
43
31
21
16
27
44
32
UART1
5
5
38
6
6
37
29
4
4
39
3
3
40
Port
PTD6
PTE6
PTC4
PTC6
PTA7
PTE7
PTC5
PTA4
PTF4
PTA5
PTC2
PTA3
PTF5
PTA2
PTF6
Module signal(s)
UART0_RX
UART0_RX
UART0_RX
UART0_TX
UART0_TX
UART0_TX
UART0_TX
UART1_CTS_b
UART1_CTS_b
UART1_RTS_b
UART1_RTS_b
UART1_RX
UART1_RX
UART1_TX
UART1_TX
9 Revision History
The following table provides a revision history for this document.
Table 36. Revision History
Rev. No.
0
Date
05/2011
Substantial Changes
Initial released version
MCF51QH128 Advance Information Data Sheet, Rev. 0, 05/2011.
Freescale Semiconductor, Inc.
Preliminary
67