Figure 13 : Output Test Load.
Figure 14 : INTR Test Load.
MK68564
For al l Outputs Except
f or
DTACK, D0-D7
IN TR, XTAL2
CL = 130pf
RL = 16KΩ
R1 = 450Ω
DTACK, D0-D7
CL = 130pf
RL = 6KΩ
R1 = 200Ω
Figure 15 : Read Cycle.
Note : XT AL2 Output T est Load is a Crystal .
Not e : Waveform Measurement for all Inputs and Outputs are S peci fied at Logic Hi gh = 2. 0 Volt s, Logic Low = 0.8 Volts.
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