ML2724DH-T View Datasheet(PDF) - Micro Linear Corporation

Part Name

Description

MFG CO.

ML2724DH-T

2.4GHz Low-IF 1.5Mbps FSK Transceiver

Micro Linear Corporation 

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ML2724

NAME

Reserved

Reserved

Reserved

Reserved

RCLP

LVLO

Reserved

TXM

TPC

TXCW

Reserved

AOUT

RD0

QPP

ADR1

ADR0

NAME

Reserved

Reserved

CHQ11

CHQ10

CHQ9

CHQ8

CHQ7

CHQ6

CHQ5

CHQ4

CHQ3

CHQ2

CHQ1

CHQ0

ADR1

ADR0

DESCRIPTION

DEFINITION

Reserved

Reserved

Reserved

Reserved

RSSI Clip Disable

Low Voltage Lockout

Reserved

TX RF Output Mode

Transmit Power Control

Transmit Test Mode

Reserved

Analog Output

Reference Frequency Select

PLL Charge Pump Polarity

MSB Address Bit

LSB Address Bit

Set all bits to 0 (zero)

0: RSSI clipped to 1.9V at –15dBm

1: RSSI not clipped

0: PAON Undisturbed

1: PAON De-asserted for VCCA<2.65V. Reset on RXON high

Set to 0

0: TX RF Output always on in TX mode

1: TX RF Output follows PAON signal

0: AOUT pin pulled to ground

1: AOUT pin high impedance

0: FSK modulation in Transmit mode

1: CW (no modulation in Transmit mode)

Set to 0

0: AOUT pin is Transmit Power Control

1: AOUT pin is Analog Data Out

0: 6.144MHz nominal reference frequency

1: 12.288MHz nominal reference frequency (preferred)

0: For fc < fref, charge pump sources current

1: For fc < fref, charge pump sinks current

ADR1=0

ADR0=0

Table 3: Register 0 -- PLL Configuration Register

DESCRIPTION

DEFINITION

Set all bits to 0 (zero)

Channel Frequency select bits

Divide ratio=fc/1.024

MSB Address Bit

ADR1=0

LSB Address Bit

ADR0=1

Table 4: Register 1 – Channel Frequency Register

DS2724-F-03

FINAL DATASHEET

DECEMBER 2005 18

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