FEDL7029-04
ML7029
Operating Conditions at Sampling Frequency = 21 kHz
Parameter
Power Supply Voltage
Operating Temperature Range
Digital Input High Voltage
Symbol
VDD
Ta
Condition
Voltage must be fixed
—
VIH
Digital input pin
Min.
3.3
–25
0.95
VDD
Digital Input Low Voltage
VIL
Digital input pin
0
Master Clock Frequency
fMCK1
MCK
—
Master Clock Frequency Accuracy fMCK2
MCK
–0.01%
Sampling Frequency
fSYNC
SYNC
—
Master Clock Duty Ratio
DMCK
—
40
Transmit S/N Ratio
(at 3 dBm0 input)
SD19T1
—
—
Transmit S/N Ratio
(at –40 dBm0 input)
SD19T2
—
—
Receive S/N Ratio
(at 3 dBm0 input)
SD19R1
—
—
Receive S/N Ratio
(at –40 dBm0 input)
SD19R2
—
—
Typ.
—
—
—
27.216
SYNC
1296
21
—
46.1
20.2
44.8
37.8
Max.
3.6
+50
VDD
0.05
VDD
—
+0.01
—
70
—
—
—
—
Unit
V
C
V
V
MHz
MHz
kHz
%
dB
dB
dB
dB
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