LAPIS Semiconductor
FEDL9042-01
ML9042-xx
Cursor/Blink Control Circuit
This circuit generates the cursor and blink of the LCD.
The operation of this circuit is controlled by the program of the CPU.
The cursor/blink display is carried out in the position corresponding to the DDRAM address set in the ADC
(Address Counter).
For example, when the ADC stores a value of “07” (hexadecimal), the cursor or blink is displayed as follows:
ADC
DB6
DB0
0 00 0 111
In 1-line display mode
0
7
Digit
1234 567 89
00 01 02 03 04 05 06 07 08
19 20
12 13
Cursor/blink position
In 2-line display mode
First line
Digit
1234 567 89
00 01 02 03 04 05 06 07 08
Second line 40 41 42 43 44 45 46 47 48
19 20
12 13
52 53
Cursor/blink position
Note: The cursor or blink is also displayed even when a CGRAM or ABRAM address is set in
the ADC. Therefore, the cursor or blink display should be inhibited while the ADC is
holding a CGRAM or ABRAM address.
24/58