ML9042 View Datasheet(PDF) - LAPIS Semiconductor Co., Ltd.
Part Name
Description
MFG CO.
'ML9042' PDF : 58 Pages View PDF
LAPIS Semiconductor
FEDL9042-01
ML9042-xx
Instruction Codes
An instruction code is a signal sent from the CPU to access the ML9042. The ML9042 starts operation as
instructed by the code received. The busy status of the ML9042 is rather longer than the cycle time of the CPU,
since the internal processing of the ML9042 starts at a timing which does not affect the display on the LCD. In the
busy status (Busy Flag is “1”), the ML9042 cannot input the Busy Flag Read instruction only. Therefore, the CPU
should ensure that the Busy Flag is “0” before sending an instruction code to the ML9042.
1) Display Clear
Instruction Code:
RS1 RS0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1
0
0
0
0
0
0
0
0
0
1
When this instruction is executed, the LCD display including arbitrator display is cleared and the I/D entry
mode is set to “Increment”. The value of “S” (Display shifting) remains unchanged. The position of the cursor
or blink being displayed moves to the left end of the LCD (or the left end of the line 1 in the 2-line display
mode).
Note:
All DDRAM and ABRAM data turn to “20” and “00” in hexadecimal, respectively. The value of the
address counter (ADC) turns to the one corresponding to the address “00” (hexadecimal) of the
DDRAM.
The execution time of this instruction is 1.52 ms (maximum) at an oscillation frequency of 270 kHz.
2) Cursor Home
Instruction code:
RS1
RS0
R/W DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
0
0
0
0
0
0
0
0
1
: Don’t Care
When this instruction is executed, the cursor or blink position moves to the left end of the LCD (or the left end
of line 1 in the 2-line display mode). If the display has been shifted, the display returns to the original display
position before shifting.
Note:
The value of the address counter (ADC) goes to the one corresponding to the address “00”
(hexadecimal) of the DDRAM).
The execution time of this instruction is 1.52 ms (maximum) at an oscillation frequency of 270 kHz.
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