MPC8349VVALF View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
MPC8349VVALF
Freescale Semiconductor
'MPC8349VVALF' PDF : 88 Pages View PDF
Package and Pin Listings
Table 51. MPC8349E (TBGA) Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power
Supply
LVDD1
C9, D11
Power for three
speed Ethernet
#1 and for
Ethernet
management
interface I/O
(2.5 V, 3.3 V)
LVDD1
LVDD2
C6, D9
Power for three
speed Ethernet
#2 I/O (2.5 V,
3.3 V)
LVDD2
VDD
OVDD
E19, E29, F7, F9, F11,F13, F15, F17, F18,
F21, F23, F25, F29, H29, J6, K29, M29,
N6, P29, T29, U30, V6, V29, W29, AB29,
AC5, AD29, AF6, AF29, AH29, AJ8, AJ12,
AJ14, AJ16, AJ18, AJ20, AJ21, AJ23,
AJ25, AJ26, AJ27, AJ28, AJ29, AK10
Power for core
(1.2 V)
B22, B28, C16, C17, C24, C26, D13, D15,
D19, D29, E31, F28, G33, H30, L29, L32,
N32, P31, R31, U32, W31, Y29, AA29,
AC30, AE31, AF30, AG29, AJ17, AJ30,
AK11, AL15, AL19, AL21, AL29, AL30,
AM20, AM23, AM24, AM26, AM28, AN11,
AN13
PCI, 10/100
Ethernet, and
other standard
(3.3 V)
VDD
OVDD
MVREF1
M3
I
DDR
reference
voltage
MVREF2
AD2
I
DDR
reference
voltage
Notes:
1. This pin is an open-drain signal. A weak pull-up resistor (1 kΩ) should be placed on this pin to OVDD.
2. This pin is an open-drain signal. A weak pull-up resistor (2–10 kΩ) should be placed on this pin to OVDD.
3. During reset, this output is actively driven rather than three-stated.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull-up if the chip is in PCI host mode. Follow the PCI specifications.
6. This pin must always be tied to GND.
7. This pin must always be pulled up to OVDD.
8. This pin must always be left not connected.
9. Thermal sensitive resistor.
Notes
MPC8349E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 10
64
Freescale Semiconductor
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