MRF24J40-I/ML View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'MRF24J40-I/ML' PDF : 152 Pages View PDF
MRF24J40
REGISTER 2-6: EADR0: EXTENDED ADDRESS 0 REGISTER (ADDRESS: 0x05)
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
64-Bit Extended Address bits (EADR<7:0>)
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EADR<7:0>: 64-Bit Extended Address bits
REGISTER 2-7: EADR1: EXTENDED ADDRESS 1 REGISTER (ADDRESS: 0x06)
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
64-Bit Extended Address bits (EADR<15:8>)
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EADR<15:8>: 64-Bit Extended Address bits
REGISTER 2-8: EADR2: EXTENDED ADDRESS 2 REGISTER (ADDRESS: 0x07)
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
64-Bit Extended Address bits (EADR<23:16>)
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
EADR<23:16>: 64-Bit Extended Address bits
© 2008 Microchip Technology Inc.
Preliminary
DS39776B-page 21
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