MRF24J40-I/ML View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'MRF24J40-I/ML' PDF : 152 Pages View PDF
MRF24J40
REGISTER 2-18: ESLOTG1: GTS1 AND CAP END SLOT REGISTER (ADDRESS: 0x13)
R/W-0
GTS1-3
bit 7
R/W-0
GTS1-2
R/W-0
GTS1-1
R/W-0
GTS1-0
R/W-0
CAP3
R/W-0
CAP2
R/W-0
CAP1
R/W-0
CAP0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-4
bit 3-0
GTS1-<3:0>: End Slot of 1st GTS bits
1111 = 15
…
0000 = 0 (default)
CAP<3:0>: Contention Access Period (CAP) End Slot bits
1111 = 15
…
0000 = 0 (default)
DS39776B-page 28
Preliminary
© 2008 Microchip Technology Inc.
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